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SAF3560HV/V1101,51

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
1. General description
The SAF3560 is a digital radio processor that demodulates and processes digital
terrestrial baseband signals, such as HD Radio signals, into audio signals and digital data
signals.
Major benefits of terrestrial radio processor systems with SAF3560 are:
• Compatibility with conventional baseband radio reception ICs
• Dramatically improved reception and sound quality
• CD-sound quality without noise, interference and multipath fading for FM
• Providing new data services
• HD Radio reception including audio processing
• Voltage partitioning of I/Os
• Available in both LFBGA and HLQFP packages
SAF3560
Terrestrial digital radio processor
Rev. 5 — 8 February 2013 Product short data sheet
(1) The second input is only supported by specific types (see Ta ble 3)
Fig 1. System block diagram
001aal423
TUNER1
OPTIONAL AUDIO POST
PROCESSING
AND STEREO
AUDIO DAC
RENDERING
OF DATA:
LIVE TRAFFIC REPORTS
WEATHER
SPORTS SCORES
STOCK TICKER
TUNER2
IF PROCESSING
IF PROCESSING
SAF3560
MICROPROCESSOR
SERIAL NOR-FLASH
MEMORY
SDRAM
SPI2
blended
audio (analog)
I
2
C-bus or SPI1
baseband I
2
S
interface
baseband
I
2
S
interface
digital
audio
blend
SAF3560_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 5 — 8 February 2013 2 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
System designers can add digital terrestrial radio capability in a simple and inexpensive
way through the SAF3560. The SAF3560 decodes digital radio input to provide digital
audio and also processes digital data. Multiple interfaces give flexibility while integrating
the SAF3560 into the receiver system.
2. Features and benefits
2.1 HD Radio technology
HD Radio signal decoding for AM and FM digital audio
Dual HD Radio support for support of second station for background scanning and
data service
Front end to baseband interface support through serial baseband I
2
S-bus type
interface
Secondary baseband interface for dual tuner applications
Metadata support for HD Radio reception
Data services support for HD Radio reception
Advanced HD Radio feature support, such as
1
:
Conditional Access (CA)
Store and replay
Apple ID3 tag
Multicasting
Electronic Program Guide (EPG)
2.2 Digital audio
Up to 6 channel (5.1) audio support through I
2
S-bus serial audio interface
Optional SRC (8 kHz to 48 kHz) for up to 6 channels of I
2
S-bus audio output
I
2
S-bus serial audio input for auxiliary processing
Optional SRC (8 kHz to 48 kHz) for I
2
S-bus input
Optional restricted support for 96 kHz input and output sample-rate conversion
Optional digital audio output through S/PDIF (without SRC)
Basic audio processing for external digital audio sources
Advanced audio processing (contact NXP Semiconductors for a list of supported audio
processing features: Section 14 “
Contact information”)
2.3 Memory
Supports SDR-SDRAM controller (up to 512 Mbit in 16-bit configuration)
Supports serial NOR-Flash memory with various sizes depending on the actual
application
1. Contact NXP Semiconductors for a detailed list of supported feature sets: Section 14 “Contact information”.
SAF3560_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 5 — 8 February 2013 3 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
2.4 Other peripheral interfaces
Two I
2
C-bus interfaces
Three Serial Peripheral Interfaces (SPI)
One UART interface
Five individual GPIO pins for applications and diagnostics
One JTAG interface for diagnostics
2.5 Miscellaneous
One internal clock oscillator and two internal Phase-Locked Loops (PLL)
Can run on external crystal or reference clock from an external IC
Powerful signal and audio processing core architecture
Qualified in accordance with AEC-Q100
3. Quick reference data
[1] Through pins V
DDA(OSC)(1V2)
, V
DDA(PLL)(1V2)
, V
DDD(C)(1V2)
and V
DDD(MEM)(1V2)
.
[2] Through pins V
DDD(GP)(3V3)
, V
DDD(DSP)(3V3)
, V
DDD(JTAG)(3V3)
, V
DDD(MC)(3V3)
and V
DDD(SDRAM)(3V3)
.
Table 1. Power supply characteristics
After power-up the SAF3560 needs a reset pulse for at least 2 ms.
Symbol Parameter Conditions Min Typ Max Unit
Supply voltages
V
DDA(OSC)(1V2)
oscillator analog supply voltage (1.2 V) 1.14 1.2 1.32 V
V
DDA(PLL)(1V2)
PLL analog supply voltage (1.2 V) 1.14 1.2 1.32 V
V
DDD(C)(1V2)
core digital supply voltage (1.2 V) 1.14 1.2 1.32 V
V
DDD(GP)(3V3)
general purpose digital supply voltage (3.3 V) 3.0 3.3 3.6 V
V
DDD(DSP)(3V3)
DSP digital supply voltage (3.3 V) 3.0 3.3 3.6 V
V
DDD(JTAG)(3V3)
JTAG digital supply voltage (3.3 V) 3.0 3.3 3.6 V
V
DDD(MC)(3V3)
microcontroller digital supply voltage (3.3 V) 3.0 3.3 3.6 V
V
DDD(MEM)(1V2)
memory digital supply voltage (1.2 V) 1.14 1.2 1.32 V
V
DDD(SDRAM)(3V3)
SDRAM digital supply voltage (3.3 V) 3.0 3.3 3.6 V
Supply currents
I
DD
supply current all core related blocks
[1]
-90116mA
all I/O related blocks
[2]
- 2837mA
Power dissipation
P
tot
total power dissipation - 0.2 0.5 W
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SAF3560HV/V1101,51

Mfr. #:
Buy SAF3560HV/V1101,51
Manufacturer:
NXP Semiconductors
Description:
DIGITAL RADIO PROCESSOR 144HLQFP
Lifecycle:
New from this manufacturer.
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