SAF3560_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 5 — 8 February 2013 10 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
[1] Table 16 defines the pin type.
Table 7. Pin description (power supplies)
Symbol Pin Type
[1]
Description
HLQFP144 LFBGA170
Global ground supply
V
SS
130, 137, 144 and
backside contact
B4, B8, B11, C5, C7, C10,
C13, E14, F6 to F9, F11,
G6 to G9, H6 to H9, H13,
J6 to J9, J11, N12 and M13
G analog and digital global ground supply
Analog supplies
V
DDA(OSC)(1V2)
140 C4 P oscillator analog supply voltage (1.2 V)
V
DDA(PLL)(1V2)
139 A5 P PLL analog supply voltage (1.2 V)
Digital supplies
V
DDD(C)(1V2)
14, 27, 63, 91, 124
and 134
A9, B6, F4, J1, J14 and P6 P core digital supply voltage (1.2 V)
V
DDD(GP)(3V3)
34 and 42 L3 and M1 P general purpose digital supply voltage (3.3 V)
V
DDD(DSP)(3V3)
64 and 71 L10 and P10 P DSP digital supply voltage (3.3 V)
V
DDD(JTAG)(3V3)
138 B5 P JTAG digital supply voltage (3.3 V)
V
DDD(MC)(3V3)
6, 15, 21 and 28 D4, J2, J3 and J4, P microcontroller digital supply voltage (3.3 V)
V
DDD(SDRAM)(3V3)
80, 85, 90, 96,
101, 107, 112, 116,
122 and 129
A12, B14, C9, D7, D13, F14,
G12, J13, K12 and N14,
P SDRAM digital supply voltage (3.3 V)
V
DDD(MEM)(1V2)
70, 102 and 143 B3, E11 and N10 P memory digital supply voltage (1.2 V)
Table 8. Pin description (baseband interface)
Symbol Pin Type
[1]
Description
HLQFP144 LFBGA170
Baseband interface
BB1_I2S_BCK 55 L7 IOZU-H bit clock input and output of first baseband interface
BB1_I2S_I 57 N7 IZU-H I data input line of first baseband interface
BB1_I2S_Q 58 P7 IZU-H Q data input line of first baseband interface
BB1_I2S_WS 56 M7 IOZU-H word select input and output line of first baseband interface
BLEND 69 L9 OL blend indicator output,
HIGH = digital audio / LOW = analog radio
[2]
BB2_I2S_BCK 59 L8 IOZU-H bit clock input and output of second baseband interface
BB2_I2S_I 61 N8 IZU-H I data input line of second baseband interface
BB2_I2S_Q 62 P8 IZU-H Q data input line of second baseband interface
BB2_I2S_WS 60 M8 IOZU-H word select input and output line of second baseband interface
Audio interface
HBCKOUT 65 M10 IOZU high-speed bit clock output
[3]
I2S_I_BCK 75 L11 IOZU-H bit clock input and output line of I
2
S-bus input interface
I2S_I_SD 76 K11 IZU-H serial data input line of I
2
S-bus input interface
I2S_I_WS 74 M11 IOZU-H word select input and output line of I
2
S-bus input interface
I2S3_O_SD/
SPDIF_O
73 N11 OL serial data output line of third I
2
S-bus output interface;
in alternative Sony/Philips digital output interface
