SAF3560_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product short data sheet Rev. 5 — 8 February 2013 9 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
[1] See Table 15 for unused pins.
6.2 Pin description
Row L
L1 GPIO0 L2 GPIO1 L3 V
DDD(GP)(3V3)
L4 SPI3_SS2_N
L5 -
[1]
L6 - L7 BB1_I2S_BCK L8 BB2_I2S_BCK
L9 BLEND L10 V
DDD(DSP)(3V3)
L11 I2S_I_BCK L12 SDRAM_DIO2
L13 SDRAM_DIO5 L14 SDRAM_DIO8
Row M
M1 V
DDD(GP)(3V3)
M2 GPIO2 M3 GPIO3 M4 GPIO4
M5 - M6 - M7 BB1_I2S_WS M8 BB2_I2S_WS
M9 I2S1_O_WS M10 HBCKOUT M11 I2S_I_WS M12 SDRAM_DIO1
M13 V
SS
M14 SDRAM_DIO7
Row N
N1 - N2 - N3 - N4 -
N5 - N6 - N7 BB1_I2S_I N8 BB2_I2S_I
N9 I2S1_O_SD N10 V
DDD(MEM)(1V2)
N11 I2S3_O_SD/
SPDIF_O
N12 V
SS
N13 SDRAM_DIO4 N14 V
DDD(SDRAM)(3V3)
Row P
P3 - P4 - P5 - P6 V
DDD(C)(1V2)
P7 BB1_I2S_Q P8 BB2_I2S_Q P9 I2S1_O_BCK P10 V
DDD(DSP)(3V3)
P11 I2S2_O_SD P12 SDRAM_DIO0 P13 SDRAM_DIO3
Table 5. Pin allocation table (LFBGA170)
Pin Symbol Pin Symbol Pin Symbol Pin Symbol
Table 6. Pin description overview
Pin category Details Table number
Power supply pins analog and digital supply pins Table 7
Baseband interface pins baseband and audio pins (I
2
S-bus) Table 8
Generic interface pins GPIO and SPI3 pins Table 9
SDRAM interface pins data, address and control pins Table 10
Serial NOR-Flash interface pins SPI2 pins Table 11
External host microcontroller
interface pins
SPI1, I2C1, I2C2, UART, CLKOUT
and RESET_N pins
Table 12
JTAG interface pins JTAG pins Table 13
Crystal oscillator pins XTALI and XTALO pins Table 14