AD9571
Rev. 0 | Page 6 of 20
CLOCK OUTPUTS
Typical (typ) is given for V
S
= 3.3 V ± 10%, T
A
= 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full V
S
and T
A
(−40°C to +85°C) variation.
Table 6.
Parameter Min Typ Max Unit Test Conditions/Comments
LVPECL CLOCK OUTPUTS
Output Frequency 156.25 MHz
Output High Voltage (V
OH
) V
S
− 1.24 V
S
− 1.05 V
S
− 0.83 V
Output Low Voltage (V
) V
− 2.07 V
− 1.87 V
− 1.62 V
Output Differential Voltage (V
OD
) 700 825 950 mV
Duty Cycle 45 55 %
LVDS CLOCK OUTPUTS
Output Frequency 156.25 MHz
Differential Output Voltage (V
OD
) 250 350 475 mV
Delta V
OD
25 mV
Output Offset Voltage (V
OS
) 1.125 1.25 1.375 V
Delta V
25 mV
Short-Circuit Current (I
SA
, I
SB
) 14 24 mA Output shorted to GND
Duty Cycle 45 55 %
CMOS CLOCK OUTPUTS
Output Frequency 33.33 MHz
Output High Voltage (V
OH
) V
S
− 0.1 V Sourcing 1.0 mA current
Output Low Voltage (V
OL
) 0.1 V Sinking 1.0 mA current
Duty Cycle 42 58 %
TIMING CHARACTERISTICS
Typical (typ) is given for V
S
= 3.3 V ± 10%, T
A
= 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full V
S
and T
A
(−40°C to +85°C) variation.
Table 7.
Parameter Min Typ Max Unit Test Conditions/Comments
LVPECL Termination = 200 Ω to 0 V; C
LOAD
= 0 pF
Output Rise Time, t
RP
480 625 810 ps 20% to 80%, measured differentially
Output Fall Time, t
480 625 810 ps 80% to 20%, measured differentially
LVDS Termination = 100 Ω differential; C
LOAD
= 0 pF
Output Rise Time, t
160 350 540 ps 20% to 80%, measured differentially
Output Fall Time, t
FL
160 350 540 ps 80% to 20%, measured differentially
CMOS Termination = 50 Ω to 0 V; C
LOAD
= 5 pF
Output Rise Time, t
RC
0.25 0.50 2.5 ns 20% to 80%
Output Fall Time, t
FC
0.25 0.70 2.5 ns 80% to 20%
