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LTC3774EUHE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38
LTC3774
22
3774fc
For more information www.linear.com/LTC3774
APPLICATIONS INFORMATION
The initial slope is the effect of the gate-to-source and
the gate-to-drain capacitance. The flat portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V
DS
drain
voltage, but can be adjusted for different V
DS
voltages by
multiplying the ratio of the application V
DS
to the curve
specified V
DS
values. A way to estimate the C
MILLER
term
is to take the change in gate charge from points a and b
on a manufacturer’s data sheet and divide by the stated
V
DS
voltage specified. C
MILLER
is the most important se-
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specified on MOSFET
data sheets.
C
RSS
and C
OS
are specified sometimes but
definitions of these parameters are not included. When the
controller is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
MainSwitchDuty Cycle =
V
OUT
V
IN
Synchronous SwitchDuty Cycle =
V
IN
– V
OUT
V
IN
⎛
⎝
⎜
⎞
⎠
⎟
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
( )
2
1+δ
( )
R
DS(ON)
+
V
IN
( )
2
I
MAX
2
⎛
⎝
⎜
⎞
⎠
⎟
R
DR
( )
C
MILLER
( )
•
1
V
INTVCC
– V
TH(MIN)
+
1
V
TH(MIN)
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
• f
P
SYNC
=
V
IN
– V
OUT
V
IN
I
MAX
( )
2
1+δ
( )
R
DS(ON)
where δ is the temperature dependency of R
DS(ON)
, R
DR
is the effective top driver resistance (approximately 2Ω at
V
GS
= V
MILLER
), V
IN
is the drain potential and the change
in drain potential in the particular application. V
TH(MIN)
is the data sheet specified typical gate threshold voltage
specified in the power MOSFET data sheet at the specified
drain current. C
MILLER
is the calculated capacitance using
the gate charge curve from the MOSFET data sheet and
the technique described above.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
IN
< 20V,
the high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V, the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
An optional Schottky diode across the synchronous
MOSFET conducts during the dead time between the con-
duction of the two large power MOSFETs. Thi
s prevents the
body diode of the bottom MOSFET from turning on, storing
charge during the dead time and requiring a reverse-recovery
period which could cost as much as several percent in effi-
ciency. A 2A
to 8A Schottky is generally a good compromise
for both regions of operation due to the relatively small
average current. Larger diodes result in additional transition
loss due to their larger junction capacitance.
MOSFET Driver Selection
Gate driver ICs, DrMOSs and power blocks with an interface
compatible with the LTC3774's three-state PWM outputs
or the LTC3774's PWM/PWMEN outputs can be used.
Always enable the power stage first, before the LTC3774
is enabled.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
LTC3774
23
3774fc
For more information www.linear.com/LTC3774
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
≈
I
MAX
V
IN
V
OUT
( )
V
IN
– V
OUT
( )
⎡
⎣
⎤
⎦
1/2
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3774, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
Ceramic capacitors are becoming very popular for small
designs but several cautions should be observed. X7R, X5R
and Y5V are examples of a few of the ceramic materials
used as the dielectric layer, and these different dielectrics
have very different effect on the capacitance value due to
the voltage and temperature conditions applied. Physically,
if the capacitance value changes due to applied voltage
change, there is a concomitant piezo effect which results
in radiating sound! A load that draws varying current at
an audible rate may cause an attendant varying input volt
-
age on a ceramic capacitor, resulting in an audible signal.
A secondary issue relates to the energy flowing back into
a ceramic capacitor
whose capacitance value is being
reduced by the increasing charge. The voltage can increase
a
t a considerably higher rate than the constant current being
supplied because the capacitance value is decreasing as
the voltage is increasing! Nevertheless, ceramic capacitors,
when properly selected and used, can provide the lowest
overall loss due to their extremely low ESR.
A small (0.1µF to 1µF) bypass capacitor, C
IN
, between the
chip V
IN
pin and ground, placed close to the LTC3774, is
also suggested. A 2.2Ω to 10Ω resistor placed between
C
IN
and V
IN
pin provides further isolation.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically once the ESR require-
ment is satisfied the capacitance is adequate for filtering.
The steady-state output ripple
(
∆V
OUT
) is determined by:
∆V
OUT
≈ ∆I
RIPPLE
ESR+
1
8fC
OUT
⎛
⎝
⎜
⎞
⎠
⎟
where f = operating frequency, C
OUT
= output capacitance
and ∆I
RIPPLE
= ripple current in the inductor. The output
ripple is highest at maximum input voltage since ∆I
RIPPLE
increases with input voltage. The output ripple will be less
than 50mV at maximum V
IN
with ∆I
RIPPLE
= 0.4I
OUT(MAX)
assuming:
C
OUT
required ESR < N • R
SENSE
and
C
OUT
>
1
8f
( )
R
SENSE
( )
The emergence of very low ESR capacitors in small, surface
mount packages makes very small physical implementa-
tions possible. The ability to externally compensate the
switching regulator loop using the ITH pin allows a much
wider selection of output capacitor types
.
The impedance
characteristic of each capacitor type is significantly differ
-
ent than an ideal capacitor and therefore requires accurate
modeling or bench evaluation during design. Manufacturers
such as Nichicon, Nippon Chemi-Con and Sanyo should be
considered for high performance through-hole capacitors.
The OS-CON semiconductor dielectric capacitors available
from Sanyo and the Panasonic SP surface mount types
have a good (ESR)(size) product.
Once the ESR requirement for C
OUT
has been met, the RMS
current rating generally far exceeds the I
RIPPLE(P-P)
require-
ment. Ceramic capacitors from AVX, Taiyo Yuden, Murata
and TDK
offer high capacitance value and very low ESR,
especially applicable for low output voltage applications.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum
electrolytic and dry tantalum capacitors are both available
in surface mount configurations. New special polymer
surface mount capacitors offer very low ESR also but
have much lower capacitive density per unit volume. In
APPLICATIONS INFORMATION
LTC3774
24
3774fc
For more information www.linear.com/LTC3774
APPLICATIONS INFORMATION
the case of tantalum, it is critical that the capacitors are
surge tested for use in switching power supplies. Several
excellent choices are the AVX TPS, AVX TPSV, the KEMET
T510 series of surface mount tantalums or the Panasonic
SP series of surface mount special polymer capacitors
available in case heights ranging from 2mm to 4mm. Other
capacitor types include Sanyo POSCAP, Sanyo OS-CON,
Nichicon PL series and Sprague 595D series. Consult the
manufacturers for other specific recommendations.
Differential Amplifier
The LTC3774 has true remote voltage sense capability. The
sense connections should be returned from the load, back
to the differential amplifier’s inputs through a common,
tightly coupled pair of PC traces. The differential amplifier
rejects common mode signals capacitively or inductively
radiated into the feedback PC traces as well as ground
loop disturbances. The LTC3774 diffamp has high input
impedance on V
OSNS
+
pin. The output of the diffamp con-
nects to the inverting input of the error amplifier internally.
Setting Output Voltage
The
LTC3774 output voltage is set by an external feed
-
back resistive divider carefully placed across the output,
as shown in Figure 2. The regulated output voltage is
determined by:
V
OUT
= 0.6V • 1+
R
D1
R
D2
⎛
⎝
⎜
⎞
⎠
⎟
To improve the frequency response, a feedforward ca-
pacitor, C
F1
, may be used. Great care should be taken to
route the V
OSNS
+
line away from noise sources, such as
the inductor or the SW line.
To minimize the effect of the voltage drop caused by high
current flowing through board conductance; connect
V
OSNS
– and V
OSNS
+ sense lines close to the ground and
the load output respectively.
External Soft-Start and Tracking
The LTC3774 has the ability to either soft-start by itself
or track the output of another channel or external supply.
When the controller is configured to soft-start by itself, a
capacitor may be connected to its TK/SS pin or the internal
soft-start may be used. The controller is in the shutdown
state if its RUN pin voltage is below 1.22V and its TK/SS
pin is actively pulled to ground in this shutdown state. If
the RUN pin voltage is above 1.22V, the controller powers
up. A soft-start current of 1.25µA then starts to charge the
TK/SS soft-start capacitor. Note that soft-start or tracking
is achieved not by limiting the maximum output current of
the controller but by controlling the output ramp voltage
according to the ramp rate on the TK/SS pin. The soft-start
or tracking range is defined to be the voltage range from
0V to 0.6V on the TK/SS pin. The total soft-start time can
be calculated as:
t
SOFTSTART
= 0.6 •
C
SS
1.25µA
Regardless of the mode selected by the MODE/PLLIN pin,
the controller always starts in discontinuous mode up to
TK/SS =
0.5V. Between TK/SS = 0.5V and 0.565V, it will
operate in for
ced continuous mode and revert to the
selected mode once TK/SS > 0.565V. The output ripple
is minimized during the 65mV forced continuous mode
window, ensuring a clean PGOOD signal. When the chan
-
nel is configured to track another supply, the feedback
voltage of the other supply is duplicated by a resistor
divider and applied to the TK
/
SS pin. Therefore, the volt
-
age ramp rate on this pin is determined by the ramp rate
of the other supply’s voltage. It is only possible to track
another supply that is slower than the internal soft-start
ramp. Note that the small soft-start capacitor charging
current is always flowing, producing a small offset error.
To minimize this error, select the tracking resistive divider
value to be small enough to make this error negligible.
In order to track down another channel or supply after
the soft-start phase expires, the LTC3774 is forced into
continuous mode of operation as soon as V
OSNS
+
is below
the power good lower threshold regardless of the setting
on the MODE/PLLIN pin. However, the LTC3774 should
always be set in forced continuous mode tracking down
when there is no load. After TK/SS drops below 0.1V, the
controller operates in discontinuous mode.
The LTC3774 allows the user to program how its output
ramps up and down by means of the TK/SS pin. Through
these pins, the output can be set up to either coincidentally
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LTC3774EUHE#TRPBF

Mfr. #:
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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual, Multiphase Current Mode Synchronous Controller for Sub-Milliohm DCR Sensing
Lifecycle:
New from this manufacturer.
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