LTC2872
18
2872f
Inrush Current and Supply Overshoot Precaution
In certain applications fast supply slew rates are gener-
ated when power is connected. If V
CC
’s voltage is greater
than 4.5V and its rise time is faster than 10μs, the pins
V
DD
and SW can exceed their Absolute Maximum values
during start-up. When supply voltage is applied to V
CC
, the
voltage difference between V
CC
and V
DD
generates inrush
current flowing through inductor L1 and capacitors C1 and
C2. The peak inrush current must not exceed 2A. To avoid
this condition, add a 1Ω resistor as shown in Figure 14.
This precaution is not relevant for supply voltages below
4.5V or rise times longer than 10μs.
by more than 1V for proper operation. Logic input pins
do not have internal biasing devices to pull them up or
down. They must be driven high or low to establish valid
logic levels; do not float.
RS485 Driver
The RS485 driver provides full RS485/RS422 compat-
ibility. When enabled, if DI is high, Y–Z is positive. When
the driver is disabled, Y and Z output resistance is greater
than 96k (typically 125k) to ground over the entire common
mode range of –7V to 12V. This resistance is equivalent
to the input resistance on these lines when the driver is
configured in half-duplex mode and Y and Z act as the
RS485 receiver inputs.
Driver Overvoltage and Overcurrent Protection
The RS232 and RS485 driver outputs are protected from
short circuits to any voltage within the Absolute Maximum
range ±15V. The maximum current in this condition is
90mA for the RS232 driver and 250mA for the RS485 driver.
If an RS485 driver output is shorted to a voltage greater
than V
CC
, when active high, positive current of about
100mA can flow from the driver output back to V
CC
. If the
system power supply or loading cannot sink this excess
current, clamp V
CC
to GND with a Zener diode (e.g., 5.6V,
1W, 1N4734) to prevent an overvoltage condition on V
CC
.
All devices also feature thermal shutdown protection that
disables the drivers, receivers, and RS485 terminators in
case of excessive power dissipation (see Note 6).
RS485 Balanced Receiver with Full Failsafe Support
The LTC2872 RS485 receiver has a differential threshold
voltage that is about 80mV for signals that are rising
and –80mV for signals that are falling, as illustrated in
Figure 15. If a differential input signal lingers in the win-
dow between these thresholds for more than about 2µs,
the rising threshold changes from 80mV to –50mV, while
the falling threshold remains at –80mV. Thus, differential
inputs that are shorted, open, or terminated but not driven
for more than 2µs produce a high on the receiver output,
indicating a failsafe condition.
applicaTions inForMaTion
Figure 14. Supply Current Overshoot Protection
for Input Supplies of 4.5V of Higher
V
L
Logic Supply
A separate logic supply pin V
L
allows the LTC2872 to
interface with any logic signal from 1.7V to 5.5V. All logic
I/Os use V
L
as their high supply. For proper operation, V
L
should not be greater than V
CC
. During power-up, if V
L
is higher than V
CC
, the device will not be damaged, but
behavior of the device is not guaranteed. If V
L
is not con-
nected to V
CC
, bypass V
L
with a 0.1µF capacitor.
RS232 and RS485 driver outputs are undriven and the
RS485 termination resistors are disabled when V
L
or V
CC
is grounded or V
CC
is disconnected.
Although all logic input pins reference V
L
as their high
supply, they can be driven up to 7V, independent of V
L
and
V
CC
, with the exception of FEN, which must not exceed V
L
2872 F14
0V
5V
≤10µs
C1
470nF
L1
22µH
INRUSH
CURRENT
C4
2.2µF
R1
1Ω
1/8W
V
CC
V
DD
GND
SW
19 17
CAP
20
21
18
C2
2.2µF
