1998 May 15 49
Philips Semiconductors Product specification
Enhanced Video Input Processor (EVIP) SAA7111A
17.2.10 SUBADDRESS 0A
Table 22 Luminance brightness control BRIG7 to BRIG0 SA 0A
17.2.11 S
UBADDRESS 0B
Table 23 Luminance contrast control CONT7 to CONT0 SA 0B
17.2.12 S
UBADDRESS 0C
Table 24 Chrominance saturation control SATN7 to SATN0 SA 0C
17.2.13 S
UBADDRESS 0D
Table 25 Chrominance hue control HUEC7 to HUEC0 SA 0D
OFFSET
CONTROL BITS D7 to D0
BRIG7 BRIG6 BRIG5 BRIG4 BRIG3 BRIG2 BRIG1 BRIG0
255 (bright) 1 1 1 1 1 1 1 1
128 (CCIR level) 1 0 0 0 0 0 0 0
0 (dark) 0 0 0 0 0 0 0 0
GAIN
CONTROL BITS D7 to D0
CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0
1.999 (maximum) 0 1 1 1 1 1 1 1
1.109 (CCIR level) 0 1 0 0 0 1 1 1
1.0 01000000
0 (luminance off) 0 0 0 0 0 0 0 0
1 (inverse luminance) 1 1 0 0 0 0 0 0
2 (inverse luminance) 1 0 0 0 0 0 0 0
GAIN
CONTROL BITS D7 to D0
SATN7 SATN6 SATN5 SATN4 SATN3 SATN2 SATN1 SATN0
1.999 (maximum) 0 1 1 1 1 1 1 1
1.0 (CCIR level) 0 1 0 0 0 0 0 0
0 (colour off) 0 0 0 0 0 0 0 0
1 (inverse
chrominance)
11000000
2 (inverse
chrominance)
10000000
HUE PHASE (DEG)
CONTROL BITS D7 to D0
HUEC7 HUEC6 HUEC5 HUEC4 HUEC3 HUEC2 HUEC1 HUEC0
+178.6.... 0 1 1 1 1 1 1 1
....0.... 0 0 0 0 0 0 0 0
....180 10000000
1998 May 15 50
Philips Semiconductors Product specification
Enhanced Video Input Processor (EVIP) SAA7111A
17.2.14 SUBADDRESS 0E
Table 26 Chrominance control SA 0E
FUNCTION BIT NAME
LOGIC
LEVEL
CONTROL
BIT
Chroma bandwidth (CHBW0 and CHBW1)
Small bandwidth ( 620 kHz) CHBW1 0 D1
CHBW0 0 D0
Nominal bandwidth ( 800 kHz) CHBW1 0 D1
CHBW0 1 D0
Medium bandwidth ( 920 kHz) CHBW1 1 D1
CHBW0 0 D0
Wide bandwidth ( 1000 kHz) CHBW1 1 D1
CHBW0 1 D0
Fast colour time constant (FCTC)
Nominal time constant FCTC 0 D2
Fast time constant FCTC 1 D2
Disable chrominance comb filter (DCCF)
Chrominance comb filter on (during VREF = 1) (see Figs 24 and 25) DCCF 0 D3
Chrominance comb filter off DCCF 1 D3
Colour standard (CSTD0 to CSTD2); logic levels 100, 110 and 111 are reserved, do not use
Colour standard control automatic switching between PAL BGHI and
NTSC M (NTSC-Japan with special level adjustment; luminance
brightness subaddress 0A = 95H, luminance contrast
subaddress 0BH = 48H)
CSTD2 0 D6
CSTD1 0 D5
CSTD0 0 D4
Colour standard control automatic switching between NTSC 4.43 (50 Hz)
and PAL 4.43 (60 Hz)
CSTD2 0 D6
CSTD1 0 D5
CSTD0 1 D4
Colour standard control automatic switching between PAL N and
NTSC 4.43 (60 Hz)
CSTD2 0 D6
CSTD1 1 D5
CSTD0 0 D4
Colour standard control automatic switching between NTSC N and
PAL M
CSTD2 0 D6
CSTD1 1 D5
CSTD0 1 D4
Colour standard control automatic switching between SECAM and
PAL 4.43 (60 Hz)
CSTD2 1 D6
CSTD1 0 D5
CSTD0 1 D4
Clear DTO (CDTO)
Disabled CDTO 0 D7
Every time CDTO is set, the internal subcarrier DTO phase is reset to 0°
and the RTCO output generates a logic 0 at time slot 68 (see RTCO
description Fig.20). So an identical subcarrier phase can be generated by
an external device (e.g. an encoder).
CDTO 1 D7
1998 May 15 51
Philips Semiconductors Product specification
Enhanced Video Input Processor (EVIP) SAA7111A
17.2.15 SUBADDRESS 10
Table 27 Format/delay control SA 10
Table 28 VREF pulse position and length VRLN SA 10 (D3)
Notes
1. Additional VREF positions can be achieved via I
2
C-bus bits VCTR1 and VCTR0 (see Fig.9).
2. The numbers given in parenthesis refer to CCIR line counting.
Table 29 Fine position of HS HDEL0 and HDEL1 SA 10
Table 30 Output format selection OFTS0 and OFTS1 SA 10
LUMINANCE DELAY COMPENSATION
(STEPS IN 2/LLC)
CONTROL BITS D2 to D0
YDEL2 YDEL1 YDEL0
4... 1 0 0
...0... 0 0 0
...3 0 1 1
VRLN
VREF at 60 Hz 525 LINES
(1)
VREF at 50 Hz 625 LINES
(1)
0101
Length 240 242 286 288
Line number first last first last first last first last
Field 1
(2)
19 (22) 258 (261) 18 (21) 259 (262) 24 309 23 310
Field 2
(2)
282 (285) 521 (524) 281 (284) 522 (525) 337 622 336 623
FINE POSITION OF HS WITH A STEP SIZE
OF 2/LLC
CONTROL BITS D5 and D4
HDEL1 HDEL0
000
101
210
311
FORMATS
CONTROL BITS D7 and D6
OFTS1 OFTS0
RGB (5, 6 and 5), RGB (8, 8 and 8)
(dependent on control bit RGB888); see
Table 32
00
YUV 422 16 bits 0 1
YUV 411 12 bits 1 0
YUV CCIR-656 8 bits 1 1

SAA7111AHZ/V4,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC VIDEO INPUT PROCESSOR 64-LQFP
Lifecycle:
New from this manufacturer.
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