ADN2855 Data Sheet
Rev. B | Page 16 of 20
Transmission Lines
Use of 50 Ω transmission lines is required for all high frequency
input and output signals to minimize reflections: PIN, NIN,
CLKOUTP, CLKOUTN, DATxP, DATxN (also REFCLKP and
REFCLKN if a high frequency reference clock is used, such as
155.52 MHz). It is also necessary for the PIN/NIN input traces
to be matched in length, and the CLKOUTP/CLKOUTN and
DATxP/DATxN output traces to be matched in length to avoid
skew between the differential traces. All high speed LVDS outputs,
CLKOUTP/CLKOUTN and DATxP/DATxN, require a 100 Ω
differential termination at the differential input to the device
being driven by the ADN2855 outputs.
The high speed inputs, PIN and NIN, are internally terminated
with 50 Ω to an internal reference voltage.
As with any high speed mixed-signal design, take care to keep
all high speed digital traces away from sensitive analog nodes.
Soldering Guidelines for Chip Scale Package
The lands on the 32-lead LFCSP are rectangular. The PCB pad
for these should be 0.1 mm longer than the package land length
and 0.05 mm wider than the package land width. The land
should be centered on the pad to ensure that the solder joint
size is maximized. The bottom of the chip scale package has a
central exposed pad. The pad on the PCB should be at least as
large as this exposed pad. The user must connect the exposed
pad to VEE (GND) using plugged vias so that solder does not
leak through the vias during reflow. This ensures a solid
connection from the exposed pad to VEE.
