ADN2855 Data Sheet
Rev. B | Page 4 of 20
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
LVDS OUPUT CHARACTERISTICS
CLKOUTP/CLKOUTN, DATxP/DATxN
Differential Output Swing V
DIFF
See
Figure 3
260 320 400 mV
Output High Voltage V
OH
1475 mV
Output Low Voltage V
OL
925 mV
Output Offset Voltage V
OS
1125 1200 1275 mV
Output Impedance Differential 100 Ω
LVDS Outputs Timing
Rise Time 20% to 80% 115 220 ps
Fall Time 80% to 20% 115 220 ps
Setup Time t
S
0.5 − 20% 0.5 UI
Hold Time t
H
0.5 − 20% 0.5 UI
I
2
C INTERFACE DC CHARACTERISTICS (SCK, SDA) LVCMOS
Input High Voltage V
IH
0.7 VCC V
Input Low Voltage V
IL
0.3 VCC V
Input Current V
IN
= 0.1 VCC or V
IN
= 0.9 VCC −10.0 +10.0 µA
Output Low Voltage V
OL
I
OL
= 3.0 mA 0.4 V
I
2
C INTERFACE TIMING
SCK Pulse Width High t
HIGH
600 ns
SCK Pulse Width Low t
LOW
1300 ns
Start Condition Hold Time t
HD;STA
600 ns
Start Condition Setup Time t
SU;STA
600 ns
Data Setup Time t
SU;DAT
100 ns
Data Hold Time t
HD;DAT
300 ns
SCK and SDA Rise/Fall Time t
R
/t
F
20 + 0.1 Cb
1
300 ns
Stop Condition Setup Time t
SU;STO
600 ns
Bus Free Time between a Stop and a Start t
BUF
1300 ns
Input Voltage Range V
IL
0 V
V
IH
VCC V
Minimum Differential Input Drive 100 mV p-p
Reference Frequency 10 155.52 200 MHz
Required Accuracy 0 ppm
LVTTL DC INPUT CHARACTERISTICS
(SQUELCH, SADDR[2:1], RESET)
Input High Voltage V
IH
2.0 V
IL
IH
IN
IL
IN
LVTTL DC OUTPUT CHARACTERISTICS (
DATAV
)
Output High Voltage V
OH
I
OH
= −2.0 mA 2.4 V
Output Low Voltage V
OL
I
OL
= 2.0 mA 0.4 V
1
Cb = total board capacitance of one bus line in picofarads (pF). If mixed with high speed class of I
2
C devices, faster fall times are allowed.
