CS5530
DS742A4 13
initialization sequence, the user must also perform
a system reset sequence which is as follows: Write
a logic 1 into the RS bit of the configuration regis-
ter. This will reset the calibration registers and
other logic (but not the serial port). A valid reset
will set the RV bit in the configuration register to a
logic 1. After writing the RS bit to a logic 1, wait
8 master clock cycles, then write the RS bit back to
logic 0. Note that the other bits in the configura-
tion register cannot be written on this write cycle
as they are being held in reset until RS is set back
to logic 0. While this involves writing an entire
word into the configuration register to casue the
RS bit to go to logic 0, the RV bit is a read only bit,
therefore a write to the configuration register will
not overwrite the RV bit. After clearing the RS bit
back to logic 0, read the configuration register to
check the state of the RV bit as this indicates that a
valid reset occurred. Reading the configuration
register clears the RV bit back to logic 0.
Completing the reset cycle initializes the on-chip
registers to the following states:
After the configuration register has been read to
clear the RV bit, the register can then be written to
set the other function bits or other registers can be
written or read.
Once the system initialization or reset is complet-
ed, the on-chip controller is initialized into com-
mand mode where it waits for a valid command
(the first 8-bits written into the serial port are shift-
ed into the command register). Once a valid com-
mand is received and decoded, the byte instructs
the converter to either acquire data from or transfer
data to an internal register, or perform a conversion
or a calibration. The Command Register Descrip-
tions section lists all valid commands.
Offset (1 x 32)
Offset Register (1 x 32)
Conversion Data
Register (1 x 32)
Configuration Register (1 x 32)
Power Save Select
Reset System
Input Short
Voltage Reference Select
Output Latch
CS
SDI
SDO
SCLK
Read Only
Command
Register (1 × 8)
Write Only
Serial
Interface
Data (1 x 32)
Filter Rate Select
Word Rate
Unipolar/Bipolar
Open Circuit Detect
Gain (1 x 32)
Gain Register (1 x 32)
Figure 6. CS5530 Register Diagram
Configuration Register: 00000000(H)
Offset Register: 00000000(H)
Gain Register 01000000(H)
CS5530
14 DS742A4
2.2.2 Command Register Descriptions
READ/WRITE OFFSET REGISTER
R/W
(Read/Write)
0 Write offset register.
1 Read offset register.
READ/WRITE GAIN REGISTER
R/W
(Read/Write)
0 Write gain register.
1 Read gain register.
READ/WRITE CONFIGURATION REGISTER
Function: These commands are used to read from or write to the configuration register.
R/W
(Read/Write)
0 Write configuration register.
1 Read configuration register.
PERFORM CONVERSION
MC (Multiple Conversions)
0 Perform a single conversion.
1 Perform continuous conversions.
PERFORM SYSTEM OFFSET CALIBRATION
PERFORM SYSTEM GAIN CALIBRATION
SYNC1
Function: Part of the serial port re-initialization sequence.
D7(MSB) D6 D5 D4 D3 D2 D1 D0
0000R/W001
D7(MSB) D6 D5 D4 D3 D2 D1 D0
0000R/W010
D7(MSB) D6 D5 D4 D3 D2 D1 D0
0000R/W
011
D7(MSB) D6 D5 D4 D3 D2 D1 D0
1MC000000
D7(MSB) D6 D5 D4 D3 D2 D1 D0
10000101
D7(MSB) D6 D5 D4 D3 D2 D1 D0
10000110
D7(MSB) D6 D5 D4 D3 D2 D1 D0
11111111
CS5530
DS742A4 15
SYNC0
Function: End of the serial port re-initialization sequence.
NULL
Function:
This command is used to clear a port flag and keep the converter in the continuous conversion mode.
D7(MSB) D6 D5 D4 D3 D2 D1 D0
11111110
D7(MSB) D6 D5 D4 D3 D2 D1 D0
00000000

CS5530-CSZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
IC ADC 24BIT SIGMA-DELTA 20SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet