CS5530
28 DS742A4
2.9 Clock Generator
The CS5530 includes an on-chip inverting amplifi-
er which can be connected with an external crystal
to provide the master clock for the chip. Figure 17
illustrates the on-chip oscillator. It includes loading
capacitors and a feedback resistor to form a Pierce
oscillator configuration. The chips are designed to
operate using a 4.9152 MHz crystal; however, oth-
er crystals with frequencies between 1 MHz to 5
MHz can be used. One lead of the crystal should be
connected to OSC1 and the other to OSC2. Lead
lengths should be minimized to reduce stray capac-
itance. Note that while using the on-chip oscillator,
neither OSC1 or OSC2 is capable of directly driv-
ing any off chip logic. When the on-chip oscillator
is used, the voltage on OSC2 is typically 1/2 V
peak-to-peak. This signal is not compatible with
external logic unless additional external circuitry is
added. The OSC2 output should be used if the on-
chip oscillator output is used to drive other circuit-
ry.
The designer can use an external CMOS compati-
ble oscillator to drive OSC2 with a 1 MHz to 5
MHz clock for the ADC. The external clock into
OSC2 must overdrive the 60 microampere output
of the on-chip amplifier. This will not harm the on-
chip circuitry. In this scheme, OSC1 should be left
unconnected.
2.10 Power Supply Arrangements
The CS5530 is designed to operate from single or
dual analog supplies and a single digital supply.
The following power supply connections are possi-
ble:
VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V
VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V
VA+ = +3 V; VA- = -3 V; VD+ = +3 V
A VA+ supply of +2.5 V, +3.0 V, or +5.0 V should
be maintained at ±5% tolerance. A VA- supply of
-2.5 V or -3.0 V should be maintained at ±5% tol-
erance. VD+ can extend from +2.7 V to +5.5 V
with the additional restriction that [(VD+) - (VA-)
< 7.5 V].
Figure 18 illustrates the CS5530 connected with a
single +5.0 V supply to measure differential inputs
relative to a common mode of 2.5 V. Figure 19 il-
lustrates the CS5530 connected with ±2.5 V bipolar
analog supplies and a +3 V to +5 V digital supply
to measure ground referenced bipolar signals. Fig-
ures 20 illustrates the CS5532 connected with ±3 V
analog supplies and a +3 V digital supply to mea-
sure ground referenced bipolar signals.
OSC1
MCLK
NOTE: 20 pF capacitors are on chip and
should not be added externally.
1 M
OSC2
20 pF 20 pF
+
-V
TH
~
~
60 µA
Figure 17. On-chip Oscillator Model
CS5530
DS742A4 29
OSC2
VD+
VA+
VREF+
VREF-
DGNDVA -
AIN1+
SDI
SCLK
SDO
CS5530
OSC1
CS
10
+5 V
Analog
Supply
0.1 µF
0.1 µF
+
-
17
3
1
2
AIN1-
515
9
10
13
11
12
14
166
Optional
Clock
Source
Serial
Data
Interface
4.9152 MHz
20
19
7
A0
8
A1
C1
C2
4
22 nF
18
NC
NC
Figure 18. CS5530 Configured with a Single +5 V Supply
OSC2
VD+
VA+
VREF+
VREF-
DGNDVA -
AIN1+
SDI
SCLK
SDO
CS5530
OSC1
CS
+2.5 V
Analog
Supply
0.1 µF
0.1 µF
+
-
17
3
1
2
AIN1-
515
9
1
0
13
11
12
14
166
Optional
Clock
Source
Serial
Data
Interface
4.9152 MHz
20
19
7
A0
8
A1
C1
C2
4
22 nF
-2.5 V
Analog
Supply
18
+3 V ~ +5 V
Digital
Supply
NC
NC
Figure 19. CS5530 Configured with ±2.5 V Analog Supplies
CS5530
30 DS742A4
OSC2
VD+
VA+
VREF+
VREF-
DGNDVA -
AIN1+
SDI
SCLK
SDO
CS5530
OSC1
CS
10
+3 V
Analog
Supply
0.1 µF
0.1 µF
+
-
17
3
1
2
AIN1-
515
9
10
13
11
12
14
166
Optional
Clock
Source
Serial
Data
Interface
4.9152 MHz
20
19
7
A0
8
A1
C1
C2
4
22 nF
-3 V
Analog
Supply
18
NC
NC
Figure 20. CS5530 Configured with ±3 V Analog Supplies

CS5530-CSZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
IC ADC 24BIT SIGMA-DELTA 20SSOP
Lifecycle:
New from this manufacturer.
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