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PCA9501BS,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
PCA9501_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 10 February 2009 4 of 28
NXP Semiconductors
PCA9501
8-bit I
2
C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
6.2 Pin description
[1] HVQFN20 package die supply ground is connected to both V
SS
pin and exposed center pad. V
SS
pin must
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
Fig 4. Pin configuration for HVQFN20
002aab999
PCA9501BS
Transparent top view
IO4
IO2
IO3
IO5
IO1 IO6
IO0 IO7
A2 WC
INT
A5
V
SS
A4
A3
A1
A0
V
DD
SDA
SCL
5 11
4 12
3 13
2 14
1 15
6
7
8
9
10
20
19
18
17
16
terminal 1
index area
Table 3. Pin description
Symbol Pin Description
SO20, TSSOP20 HVQFN20
A0 1 19 address lines (internal pull-up)
A1 2 20
A2 3 1
A3 12 10
A4 11 9
A5 9 7
IO0 4 2 quasi-bidirectional I/O pins
IO1 5 3
IO2 6 4
IO3 7 5
IO4 13 11
IO5 14 12
IO6 15 13
IO7 16 14
INT 8 6 active LOW interrupt output (open-drain)
V
SS
10 8
[1]
supply ground
WC 17 15 active LOW write control pin
SCL 18 16 I
2
C-bus serial clock
SDA 19 17 I
2
C-bus serial data
V
DD
20 18 supply voltage
PCA9501_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 10 February 2009 5 of 28
NXP Semiconductors
PCA9501
8-bit I
2
C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
7. Functional description
Refer also to Figure 1 “Block diagram of PCA9501”.
7.1 Device addressing
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9501 is shown in Figure 6. Internal pull-up resistors
are incorporated on the hardware-selectable address pins.
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
Remark: Reserved I
2
C-bus addresses must be used with caution since they can interfere
with:
• Reserved for future use I
2
C-bus addresses (0000 011, 1111 1xx)
• Slave devices that use the 10-bit addressing scheme (1111 0xx)
• Slave devices that are designed to respond to the General Call address (0000 000)
• Hs-mode master code (0000 1xx)
Fig 5. Simplified schematic diagram of each I/O
002aac001
write pulse
read pulse
D
CI
S
FF
Q
power-on reset
data from shift register
100 µA
V
DD
IO0 to IO7
V
SS
D
CI
S
FF
Q
data to shift register
to interrupt logic
a. I/O expander b. Memory
Fig 6. PCA9501 slave addresses
002aac002
0 A5 A4 A3 A2 A1 A0 R/W
fixed
slave address
hardware programmable
002aac003
1 A5 A4 A3 A2 A1 A0 R/W
fixed
slave address
hardware programmable
PCA9501_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 10 February 2009 6 of 28
NXP Semiconductors
PCA9501
8-bit I
2
C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
7.2 Control register
The PCA9501 contains a single 8-bit register called the Control register, which can be
written and read via the I
2
C-bus. This register is sent after a successful acknowledgment
of the slave address.
It contains the I/O operation information.
7.3 I/O operations
(Refer also to Figure 5.)
Each of the PCA9501's eight I/Os can be independently used as an input or output.
Output data is transmitted to the port by the I/O Write mode (see Figure 7). Input I/O data
is transferred from the port to the microcontroller by the Read mode (see Figure 8).
Fig 7. I/O Write mode (output)
0 AS
slave address (I/O expander)
START condition R/W acknowledge
from slave
002aad290
DATA 1
data to port
A
acknowledge
from slave
12345678SCL 9
SDA DATA 2 A
write to port
data out from port
t
v(Q)
acknowledge
from slave
DATA 2 VALID
data to port
A5 A4 A3 A2 A1 A00
DATA 1 VALID
t
v(Q)
Fig 8. I/O Read mode (input)
A5 A4 A3 A2 A1 A0 1 AS0
slave address (I/O expander)
START condition R/W
acknowledge
from slave
002aad291
data from port
A
acknowledge
from master
SDA 1
no acknowledge
from master
read from
port
data into
port
data from port
DATA 1
DATA 4
INT
DATA 4
DATA 2
DATA 3
P
STOP
condition
t
v(INT)
t
rst(INT)
t
h(D)
t
su(D)
12345678SCL 9
DATA 1
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PCA9501BS,118

Mfr. #:
Buy PCA9501BS,118
Manufacturer:
NXP Semiconductors
Description:
Interface - I/O Expanders 8BIT I2C FMQB GPIONT
Lifecycle:
New from this manufacturer.
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