LTC3765
9
3765fb
For more information www.linear.com/LTC3765
OPERATION
The LTC3765 is a forward converter start-up controller and
gate driver for use in a single-switch forward converter
with active clamp reset. When connected through a pulse
transformer to the LTC3766 secondary-side synchronous
forward controller, it forms a highly efficient forward con
-
verter with
secondary-side regulation, galvanic isolation
between
input and output, and synchronous rectification.
The LTC3765 and LTC3766 bias voltages are generated
from a proprietary self-starting architecture which elimi
-
nates the need for an additional bias supply.
Linear Regulator
The
LTC3765 features an external series pass linear
regulator controller that eliminates the long start-up time
associated with a conventional trickle charger. The NDRV
pin regulates the gate of an external NMOS transistor to
ramp up the V
CC
supply with a well controlled 35µs ramp
time to the 8.5V regulation point. For low input supply
voltage applications where the threshold of the external
NMOS transistor limits the V
CC
voltage, an internal charge
pump boosts NDRV to a voltage higher than V
IN
so that
the external NMOS can be fully enhanced.
Self-Starting Start-up
When power is first applied and when the RUN pin and
V
CC
have satisfied their respective start-up requirements,
the LTC3765 begins open-loop operation using its own
internal oscillator. Power is supplied to the secondary
by switching the gate drivers with a gradually increas
-
ing duty cycle from 0% to 70% as controlled by the rate
of
rise of the voltage on the SSFLT pin. A peak charge
circuit powered from an auxiliary winding off of the main
transformer allows the LTC3766 to begin operation even
for small duty cycles. When the LTC3766 has adequate
voltage to satisfy its start-up requirements, it provides
duty cycle information through the pulse transformer as
shown in Figure 2. The LTC3765 detects this signal and
transfers control of the gate drivers to the LTC3766. The
LTC3765 turns off the linear regulator and, through an
on-chip rectifier, also extracts power from this signal.
Gate Drive Encoding
The LTC3766 secondary-side forward controller sends a
pulse-encoded signal through a small pulse transformer
and series DC restore capacitor to the IN
+
and IN
–
pins of
the LTC3765. After a brief start-up sequence to establish a
communication lock between the two parts, the LTC3765
extracts clock and duty cycle information from the signal
and uses it to
control the PG and AG gate driver outputs.
Figure
2 shows how the LTC3766 drives the pulse trans-
former in
a complementary fashion, with a duty cycle of
79%.
At the appropriate time during the positive cycle,
the LTC3766 applies a short (150ns) zero voltage pulse
across the pulse transformer, indicating the end of the
PG “on” time.
DUTY CYCLE = 15% DUTY CYCLE = 0%
150ns
150ns
3765 F02
1 CLK PER 1 CLK PER
V
IN
+
– V
IN
–
Figure 2. Gate Drive Multiplexing Scheme
Gate Drivers and Delay Adjustment
The active clamp gate driver (AG) and the primary switch
gate driver (PG) are “in-phase,” with a programmable
overlap time set by the DELAY pin. In an active clamp
forward converter topology, the delay time between the
active clamp PMOS turn-off and the primary switch NMOS
turn-on is critical for optimizing efficiency. When the active
clamp is on, the drain of the primary NMOS, or primary
switch node (SWP), is driven to a voltage of approximately
V
IN
/(1 – Duty Cycle) by the main transformer. When the
active clamp turns off, the current in the magnetizing
inductance of the transformer ramps this voltage linearly
down to V
IN
. Transitional power loss in the primary switch
is minimized by turning it on when this voltage is at a
minimum.
