RT9750
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Application Information
Device Power On
The internal bias circuit (VDDA) are powered from higher
of two voltages between VBUS and VOUT. The device will
powered on when the VDDA is higher than VDDA UVLO
threshold and EN pin is higher than V
IH_EN
. In VBUS >
VDDA UVLO & EN pin from low logic to high logic
condition, the device need maximum 500μs turn on delay
time after EN pin set to high logic.
Smart Load Switch
The RT9750 is a 8mΩ R
ON
and loading can up to 6-A
smart load switch battery charger. The load switch can
be controlled by the host via I
2
C. The load switch can be
turn on by set CHG_EN bit to 1 (0x06 bit4) if no
protection event happened (Please check 0X03 & 0X04).
The load switch can be turn off by set CHG_EN bit to 0
or pull EN pin to low. If the protection event happen the
load switch will be turn off automatically and set CHG_EN
bit to 0 The smart load switch also implement soft-on
& soft off to function minimize the inrush current and
voltage spike.
8-Channel 12-bit Analog to Digital Converter
The device integrate 8-Cannel 12 bit ADC function, user
can monitor voltage of VBUS, VOUT, VDROP (voltage
different between VBUS and VOUT), and VBAT. The user
also can monitor the internal junction temperature, battery
temperature (by external resistor divider and NTC
thermistor), and VBUS temperature (by external resistor
divider and NTC thermistor). The ADC function also provide
IBUS information for user to monitor.
User can set ADC_EN (0x07 bit3) bit to enable or disable
ADC conversion. User also can enable or disable ADC
channels respective by using register 0x07 and 0x08. The
ADC has two conversion rate 1- shot mode and continuous
mode. User can select the mode by ADC_RATE bit (0X07
bit2).
1. 1-shot mode
In this mode, user need to set ADC_EN bit to 1 to start
ADC conversion. The ADC_EN bit will change to 0
automatically after ADC start conversion. After the ADC
conversion complete, the ADC_DONE bit (0x04 bit6) will
change to 1 and INT pin will pull low if the
ADC_DONE_MASK bit is no mask. The typical conversion
time of one channel is 100μs (16 averages).
2. Continuous mode
In continuous mode, ADC conversion continuously if user
set ADC_EN bit to 1 and ADC stop conversion if user set
ADC_EN bit to 0.
User can set the ADC_AVG_EN bit to enable or disable
ADC measurement averaging function in both 1-shot mode
and continuous mode. If ADC_AVG_EN = 0 the ADC is
instantaneous measurement. If ADC_AVG_EN = 1 the ADC
is averaging measurement and user can set the number
of samples by ADC_SAMPLES bit.
Linear Regulation Mode (LDO)
The load switch implement LDO mode to regulate VOUT
voltage, battery voltage and input current. If an event that
VOUT_REG, VBAT_REG or IBUS_REG threshold is
exceeded, the load switch act as LDO and will regulate
VOUT, VBAT, IBUS (depending upon which threshold is
exceeded). These regulations threshold can be selected
by I
2
C.
Protection Features
The load switch implement 5 way hardware protection
and 2 temperature protection as below. All these protection
functions have IRQ and active with INT pin to inform host
to monitor which protection is active.
1. VBUS Over-Voltage Protection (VBUS_OVP)
When VBUS_OVP event is happened the device will turn
off load switch and the CHG_EN bit will be set to 0. User
can enable or disable this protection function by I
2
C 0x06
bit 7. The protection threshold and deglitch time also can
be selected by I
2
C (Protection threshold is 0x0A, deglitch
time is 0x09 bit0).
2. VBUS Over-Temperature Protection (TSVBUS_OTP)
As below picture, user need to place an external NTC
voltage dived circuit at TSBUS pin. When the voltage of
TSBUS pin is over the threshold, the device will turn off
load switch and set CHG_EN bit to 0. User can enable or
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disable this protection function by I
2
C (0x05 bit2). Use
also can set the threshold by I
2
C (0x11).
Pull Up
TVBUS
3. VBAT Over-Temperature Protection
(TSBAT_OTP)
As below picture, user need to place an external NTC
voltage dived circuit at TSBAT pin. When the voltage of
TSBAT pin is over the threshold, the device will turn off
load switch and set CHG_EN bit to 0. User can enable or
disable this protection function by I
2
C (0x05 bit1). Use
also can set the threshold by I
2
C (0x12).
Pull Up
TSBAT
4. IBUS Reverse Current Protection (IBUS_ IREV)
The device implement a reverse current protection function
to turn off load switch when the reverse current is detected
(current flow from VOUT to VBUS). The device set CHG_EN
to 0 when this event is detected. The user can set the
protection level and deglitch time by I
2
C (0x26 set level,
0x27 set deglitch).
5. Dropout Voltage Protection (VDROP_OVP)
VDROP is the voltage different between VBUS and VOUT.
The device implement two VDROP threshold for user to
set by I
2
C. One is VDROP_LAM and the other on is
VDROP_OVP. User can use these thresholds to monitor
the health of load switch. When the VDROP_ALM
threshold be triggered the device assert INT pin low to
alert the host. If VDROP_OVP threshold is be triggered
the device will turn off the load switch and set CHG_EN
bit to 0.
Due to the VDROP_ALM is an alarm signal, user should
set VDROP_OVP threshold higher than VDROP_ALM.
6. Junction Thermal Shutdown (TSHUT_FLT)
The device will turn off load switch and set CHG_EN bit to
0 if the threshold of junction temperature shutdown is
triggered. If the junction thermal shutdown is triggered
device asserted INT low to alert the host (no mask for
TSHUT_FLT) and also set the TSHUT_FLT bit to 1.
7. IBUS Over-Current protection (IOC_FLT)
The device monitor the current flow from VBUS to VOUT.
If the current over the threshold the device has two
protection option for user to select by I
2
C. If user set
OCP_RES bit 0 (blanking mode), the device will turn
off load switch and set CHG_EN to 0 when IBUS current
over IOC threshold. If user set OCP_RES bit 1 (hiccup
mode), load switch is disabled instantaneously, and the
device will attempt to turn on the load switch wait 250μs
to check OCP and turn off every 100ms, up to 7 times
before latching off.
I
2
C Interface Timing Diagram
The RT9750 acts as an I
2
C- bus slave. The I
2
C-bus master
configures the settings for charge mode by sending
command bytes to the RT9750 via the 2-wire7 I
2
C-bus.
After the START condition the I
2
C master sends a chip
address. This address is seven bits long followed by an
eighth bit which is a data direction bit(R/W). The second
byte selects the register to which the data will be written.
The third byte contains data to the selected register.
RT9750
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B7
12345678912
B6 B2 B1 B0
3456789123456789
C5 C4 C3 C2 C1 C0W
ACK
ACK
S
P
0B4 ACK
SCL
SDA
A0A1A2A3A4A5A6 B5 C7 C6B3
Start 1 1 0 1 0 0 1 R/W B7B6B5B4B3B2B1B0 C7C6C5C4C3C2C1C0 Stop
The 2nd Byte
(Data Address, Data)
The 3rd Byte (Data)
The 1st Byte
(Slave Address, R/W)
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature T
J(MAX)
, listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
P
D(MAX)
= (T
J(MAX)
T
A
) / θ
JA
where T
J(MAX)
is the maximum junction temperature, T
A
is
the ambient temperature, and θ
JA
is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125°C. The junction-to-ambient thermal
resistance, θ
JA
, is highly package dependent. For a WL-
CSP-42B 2.75x3.05 (BSC) package, the thermal
resistance, θ
JA
, is 28.2°C/W on a standard JEDEC 51-7
high effective-thermal-conductivity four-layer test board.
The maximum power dissipation at T
A
= 25°C can be
calculated as below :
P
D(MAX)
= (125°C 25°C) / (28.2°C/W) = 3.54W for a WL-
CSP-42B 2.75x3.05 (BSC) package.
The maximum power dissipation depends on the operating
ambient temperature for the fixed T
J(MAX)
and the thermal
resistance, θ
JA
. The derating curves in Figure 1 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Figure 1. Derating Curve of Maximum Power Dissipation
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0 25 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W) 1
Four-Layer PCB

RT9750WSC

Mfr. #:
Manufacturer:
Description:
IC BATT CHARGER 6A WL-CSP-42B
Lifecycle:
New from this manufacturer.
Delivery:
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