RT9750WSC Datasheet RT9750WSC | P16-P18

RT9750

DS9750-00 March 2017www.richtek.com

Name Function Addr Reset

EVENT_1 EVENT 0x03 0x00

Bit Mode Name Reset Value Description

7 R/C VBUS_OVP_FLT 0

VBUS over-voltage fault. This bit is set when the VBUS

voltage exceeds the limit set in VBUS_OVP register.

0 – no fault (default)

1 – VBUS OVP fault

6 R/C IBUS_REG_LDO 0

Indicates if in LDO mode due to IBUS regulation

threshold.

0 – no fault (default)

1 – IBUS in regulation

5 R/C VBAT_REG_LDO 0

Indicates if in LDO mode due to VBAT regulation

threshold.

0 – no in regulation (default)

1 – VBAT in regulation

4 R/C Reserved 0 Reserved

3 R/C VOUT_REG_LDO 0

Indicates if in LDO mode due to VOUT regulation

threshold.

0 – not in regulation (default)

1 – VOUT in regulation

2 R/C TBUS_OTP_FLT 0

VBUS over-temperature fault. This bit is set when the

TS_BUS voltage exceeds the limit set in TBUS_OTP

0 – no fault (default)

1 – VBUS over-temperature fault

1 R/C TBAT_OTP_FLT 0

BAT over-temperature fault. This bit is set when the

TS_BAT voltage exceeds the limit set in TBAT_OTP

0 – no fault (default)

1 – BAT over-temperature fault

0 R/C IBUS_IREV_FLT 0

IBUS reverse current fault. This bit is set when current

from BAT to VBUS is detected. The battery switch will be

disabled when reverse current is detected.

0 – no fault (default)

1 – IBUS reverse current fault

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RT9750

DS9750-00 March 2017 www.richtek.com

Name Function Addr Reset

EVENT_2 EVENT 0x04 0x00

Bit Mode Name Reset Value Description

7 R/C LOWCHG_ALM_FLT 0

Indicates if LOWCHG_ALM threshold is reached.

0 – no LOWCHG_ALM (default)

1 – LOWCHG_ALM when CHG_EN and IBUS <

threshold

6 R/C ADC_DONE 0

Indicates if the ADC conversion is complete for the

requested parameters in 1-shot mode only (set from

0x07).

0 – Conversion not complete (default)

1 – Conversion complete

5 R/C VDROP_ALM_FLT 0

Indicates if VDROP_ALM threshold is reached.

0 – no fault (default)

1 – VDROP_ALM fault

4 R/C VDROP_OVP_FLT 0

Indicates if VDROP_OVP threshold is reached.

0 – no fault (default)

1 – VDROP_OVP fault

3 R/C VBUS_INSERT 0

Indicates if VBUS is detected

0 – no VBUS (default)

1 – VBUS inserted (VBUS > 2.8V)

2 R/C BAT_INSERT 0

Indicates if battery is detected (sensed between BATP

and BATN).

0 – no BAT (default)

1 – BAT inserted (VBAT > 2.0V)

1 R/C TSHUT_FLT 0

IC thermal shutdown fault indicator. (TDIE > 125℃)

0 – Normal operation (default)

1 – Thermal shutdown

0 R/C IOC_FLT 0

Indicates if high current from VBUS to VOUT has hit the

internal threshold.

0 – no fault (default)

1 – High current fault

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RT9750

DS9750-00 March 2017www.richtek.com

Name Function Addr Reset

EVENT_1_EN EVENT_EN 0x05 0xFE

Bit Mode Name Reset Value Description

7 R/W VBUS_OVP_EN 1

Enables VBUS_OVP protection

0 – Disable VBUS OVP protection

1 – Enable VBUS OVP protection (default)

6 R/W IBUS_REG_EN 1

Enables IBUS regulation for LDO mode

0 – Disable IBUS OCP protection

1 – Enable IBUS OCP protection (default)

5 R/W VBAT_REG_EN 1

Enables VBAT regulation for LDO mode

0 – Disable VBAT regulation

1 – Enable VBAT regulation (default)

4 R/W Reserved 1 Reserved

3 R/W VOUT_REG_EN 1

Enables VOUT regulation in LDO mode

0 – Disable VOUT regulation

1 – Enable VOUT regulation (default)

2 R/W TBUS_OTP_EN 1

Enables TS_VBUS pin protection

0 – Disable TBUS_OTP

1 – Enable TBUS_OTP (default)

1 R/W TBAT_OTP_EN 1

Enables TS_BAT pin protection

0 – Disable TBAT_OTP

1 – Enable TBAT_OTP (default)

0 R/W VBUS_PD_EN 0

Enables the VBUS pull-down resistor

0 – Disable RVBUS_PD (default)

1 – Enable RVBUS_PD

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P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30

RT9750WSC

Mfr. #:

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