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8N3QV01EG-0081CDI8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
IDT8N3QV01 Rev G Data Sheet QUAD-FREQUENCY PROGRAMMABLE-VCXO
IDT8N3QV01GCD REVISION A
MARCH 6, 2012
7 ©2012 Integrated Device Technology, Inc.
Table 5D. LVCMOS/LVTTL DC Characteristic, V
CC
= 3.3V ± 5% or 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
FSEL[1:0], OE V
CC
= 3.3V +5% 1.7 V
CC
+0.3 V
FSEL[1:0], OE V
CC
= 2.5V +5% 1.7 V
CC
+0.3 V
V
IL
Input Low Voltage
FSEL[1:0] V
CC
= 3.3V +5% -0.3 0.5 V
OE V
CC
= 3.3V +5% -0.3 0.8 V
FSEL[1:0] V
CC
= 2.5V +5% -0.3 0.5 V
OE V
CC
= 2.5V +5% -0.3 0.8 V
I
IH
Input High Current
OE V
CC
= V
IN
= 3.465V or 2.625V 10 µA
SDATA, SCLK V
CC
= V
IN
= 3.465V or 2.625V 5 µA
FSEL0, FSEL1 V
CC
= V
IN
= 3.465V or 2.625V 150 µA
I
IL
Input Low Current
OE
V
CC
= 3.465V or 2.625V,
V
IN
= 0V
-500 µA
SDATA, SCLK
V
CC
= 3.465V or 2.625V,
V
IN
= 0V
-150 µA
FSEL0, FSEL1
V
CC
= 3.465V or 2.625V,
V
IN
= 0V
-5 µA
IDT8N3QV01 Rev G Data Sheet QUAD-FREQUENCY PROGRAMMABLE-VCXO
IDT8N3QV01GCD REVISION A
MARCH 6, 2012
8 ©2012 Integrated Device Technology, Inc.
AC Electrical Characteristics
Table 6A. VCXO Control Voltage Input (V
C
) Characterisitics, V
CC
= 3.3V ± 5% or 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: V
C
= 10% to 90% of V
CC
.
NOTE 2: Nominal oscillator gain: Pull range divided by the control voltage tuning range of 3.3V.
E.g. for ADC_GAIN[6:0] = 000001 the pull range is ±12.5ppm, resulting in an oscillator gain of 25ppm ÷ 3.3V = 7.57ppm/V.
NOTE3: For best phase noise performance, use the lowest K
V
that meets the requirements of the application.
NOTE 4: BSL = Best Straight Line Fit: Variation of the output frequency vs. control voltage V
C
, in percent. V
C
ranges from 10% to 90% V
CC
.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
K
V
Oscillator Gain, NOTE 1, 2, 3
V
CC
= 3.3V
ADC_GAIN[5:0] = 000001 7.57 ppm/V
ADC_GAIN[5:0] = 000010 15.15 ppm/V
ADC_GAIN[5:0] = XXXXXX 25 · ADC_GAIN ÷ V
CC
ppm/V
ADC_GAIN[5:0] = 111110 469.69 ppm/V
ADC_GAIN[5:0] = 111111 477.27 ppm/V
Oscillator Gain, NOTE 1, 2, 3
V
CC
= 2.5V
ADC_GAIN[5:0] = 000001 10 ppm/V
ADC_GAIN[5:0] = 000010 20 ppm/V
ADC_GAIN[5:0] = XXXXXX 25 · ADC_GAIN ÷ V
CC
ppm/V
ADC_GAIN[5:0] = 111110 620 ppm/V
ADC_GAIN[5:0] = 111111 630 ppm/V
L
VC
Control Voltage Linearity BSL Variation; NOTE 4 -1 ±0.1 +1 %
BW Modulation Bandwidth 100 kHz
R
VC
VC Input Resistance 500 k
VC
NOM
Nominal Control Voltage V
CC
÷2 V
V
C
Control Voltage Tuning
Range; NOTE 4
0V
CC
V
IDT8N3QV01 Rev G Data Sheet QUAD-FREQUENCY PROGRAMMABLE-VCXO
IDT8N3QV01GCD REVISION A
MARCH 6, 2012
9 ©2012 Integrated Device Technology, Inc.
Table 6B. AC Characteristics, V
CC
= 3.3V ± 5% or 2.5V ± 5%, V
EE
=
0V, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions. All AC parameters are characterized with P=1 and pull range = ±250 ppm.
NOTE: XTAL parameters (initial accuracy, temperature stability, aging and total stability) are guaranteed by manufacturing.
NOTE 1: This parameter is defined in accordance with JEDEC standard 65.
NOTE 2: Please refer to the phase noise plots.
NOTE 3: Please see the FemtoClockNG Ceramic 5x7 Modules Programming guide for more information on finding the optimum configuration
for phase noise.
NOTE 4: Integration range: 12kHz-20MHz.
NOTE 5: Integration range: 1kHz-40MHz.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency Q, nQ
Output Divider, N = 3 to126 15.476 866.67 MHz
Output Divider, N = 2 975 1,300 MHz
f
I
Initial Accuracy Measured at 25°C ±10 ppm
f
S
Temperature Stability
Option code = A or B ±100 ppm
Option code = E or F ±50 ppm
Option code = K or L ±20 ppm
f
A
Aging
Frequency drift over 10 year life ±3 ppm
Frequency drift over 15 year life ±5 ppm
f
T
Total Stability
Option code A or B (10 year life) ±113 ppm
Option code E or F (10 year life) ±63 ppm
Option code K or L (10 year life) ±33 ppm
tjit(cc) Cycle-to-Cycle Jitter; NOTE 1 20 ps
tjit(per) RMS Period Jitter; NOTE 1 2.85 4 ps
tjit(Ø)
RMS Phase Jitter (Random)
Fractional PLL feedback and
f
XTAL
=114.285MHz (0xxx order
codes)
17 MHz f
OUT
1300MHz,
NOTE 2,3,4
0.475 0.990 ps
f
OUT
156.25MHz, NOTE 2, 3, 4 0.487 0.757 ps
f
OUT
156.25MHz, NOTE 2, 3, 5 0.614 ps
N
(100)
Single-side band phase noise,
100Hz from Carrier
156.25MHz -72.0 dBc/Hz
N
(1k)
Single-side band phase noise,
1kHz from Carrier
156.25MHz -99.0 dBc/Hz
N
(10k)
Single-side band phase noise,
10kHz from Carrier
156.25MHz -125.7 dBc/Hz
N
(100k)
Single-side band phase noise,
100kHz from Carrier
156.25MHz -129.5 dBc/Hz
N
(1M)
Single-side band phase noise,
1MHz from Carrier
156.25MHz -140.5 dBc/Hz
N
(10M)
Single-side band phase noise,
10MHz from Carrier
156.25MHz -144.4 dBc/Hz
PSNR Power Supply Noise Rejection
50 MV Sinusoidal Noise
1kHz - 50 kHz
-54 db
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 100 425 ps
odc Output Duty Cycle 45 55 %
t
OSC
Device startup time after power-up 20 ms
t
SET
Output frequency settling time after
FSEL0 and FSEL1 values are
changed
470 µs
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

8N3QV01EG-0081CDI8

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Programmable Oscillators PROGRAMMABLE FEMTOCLOCK
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