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AD7866ARUZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
REV. A
AD7866
–3–
Parameter A Version
1
B Version
1
Unit Test Conditions/Comments
CONVERSION RATE
Conversion Time 16 16 SCLK cycles 800 ns with SCLK = 20 MHz
Track/Hold Acquisition Time
3
300 300 ns max
Throughput Rate 1 1 MSPS max See Serial Interface Section
POWER REQUIREMENTS
V
DD
2.7/5.25 2.7/5.25 V min/max
V
DRIVE
2.7/5.25 2.7/5.25 V min/max
I
DD
7
Digital I/Ps = 0 V or V
DRIVE
Normal Mode (Static) 3.1 3.1 mA max V
DD
= 4.75 V to 5.25 V. Add 0.5 mA
Typical if Using Internal Reference.
2.8 2.8 mA max V
DD
= 2.7 V to 3.6 V. Add 0.35 mA
Typical if Using Internal Reference.
Operational, f
S
= 1 MSPS 4.8 4.8 mA max V
DD
= 4.75 V to 5.25 V. Add 0.5 mA
Typical if Using Internal Reference.
3.8 3.8 mA max V
DD
= 2.7 V to 3.6 V. Add 0.5 mA
Typical if Using Internal Reference.
Partial Power-Down Mode 1.6 1.6 mA max f
S
= 100 kSPS, f
SCLK
= 20 MHz
Add 0.2 mA Typ if Using Internal
Reference.
Partial Power-Down Mode 560 560 µA max (Static) Add 100 µA Typical if Using
Internal Reference.
Full Power-Down Mode 1 1 µA max SCLK On or Off. T
A
= –40C to +85C
22 µA max SCLK On or Off. 85C < T
A
≤ 125C
Power Dissipation
7
Normal Mode (Operational) 24 24 mW max V
DD
= 5 V
11.4 11.4 mW max V
DD
= 3 V
Partial Power-Down (Static) 2.8 2.8 mW max V
DD
= 5 V. SCLK On or Off.
1.68 1.68 mW max V
DD
= 3 V. SCLK On or Off.
Full Power-Down (Static) 5 5 µW max V
DD
= 5 V. SCLK On or Off.
33 µW max V
DD
= 3 V. SCLK On or Off.
NOTES
1
Temperature ranges as follows: A, B Versions: –40°C to +125°C.
2
See Terminology section.
3
Sample tested @ 25°C to ensure compliance.
4
External reference range that may be applied at V
REF
, D
CAP
A, or D
CAP
B.
5
Relates to pins V
REF
, D
CAP
A, or D
CAP
B.
6
See Reference section for D
CAP
A, D
CAP
B output impedances.
7
See Power vs. Throughput Rate section.
Specifications subject to change without notice.
REV. A–4–
AD7866
TIMING SPECIFICATIONS
1
(V
DD
= 2.7 V to 5.25 V, V
DRIVE
= 2.7 V to 5.25 V, V
REF
= 2.5 V; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
Limit at
Parameter T
MIN
, T
MAX
Unit Description
f
SCLK
2
10 kHz min
20 MHz max
t
CONVERT
16
t
SCLK
ns max t
SCLK
= 1/f
SCLK
800 ns max f
SCLK
= 20 MHz
t
QUIET
50 ns max Minimum Time between End of Serial Read and Next Falling Edge of CS
t
2
10 ns min CS to SCLK Setup Time
t
3
3
25 ns max Delay from CS until D
OUT
A and D
OUT
B Three-State Disabled
t
4
3
40 ns max Data Access Time after SCLK Falling Edge. V
DRIVE
3 V, C
L
= 50 pF;
V
DRIVE
< 3 V, C
L
= 25 pF
t
5
0.4 t
SCLK
ns min SCLK Low Pulsewidth
t
6
0.4 t
SCLK
ns min SCLK High Pulsewidth
t
7
10 ns min SCLK to Data Valid Hold Time
t
8
4
25 ns max CS Rising Edge to D
OUT
A, D
OUT
B, High Impedance
t
9
4
10 ns min SCLK Falling Edge to D
OUT
A, D
OUT
B, High Impedance
50 ns max SCLK Falling Edge to D
OUT
A, D
OUT
B, High Impedance
NOTES
1
Sample tested at 25°C to ensure compliance. All input signals are specified with t
R
= t
F
= 5 ns (10% to 90% of V
DRIVE
) and timed from a voltage level of 1.6 V.
2
Mark/Space ratio for the CLK input is 40/60 to 60/40.
3
Measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8 V or 2.0 V.
4
t
8,
t
9
are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapo-
lated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times t
8
and t
9
quoted in the timing characteristics are the true
bus relinquish times of the part and are independent of the bus loading.
Specifications subject to change without notice.
1.6V
200␮AI
OL
200␮A
I
OH
C
L
50pF
TO
OUTPUT
PIN
Figure 1. Load Circuit for Digital Output Timing Specifications
REV. A
AD7866
–5–
ORDERING GUIDE
Resolution Package
Model Temperature Range (Bits) Package Description Option
AD7866ARU –40°C to +125°C12Thin Shrink SOC (TSSOP) RU-20
AD7866BRU –40°C to +125°C12Thin Shrink SOC (TSSOP) RU-20
EVAL-AD7866CB
1
Evaluation Board
EVAL-CONTROL BRD2
2
Controller Board
NOTES
1
This can be used as a standalone evaluation board or in conjunction with the evaluation board controller for evaluation/demonstration purposes.
2
This evaluation board controller is a complete unit, allowing a PC to control and communicate with all Analog Devices evaluation boards ending in the CB design ators.
To order a complete evaluation kit, the particular ADC evaluation board, e.g., EVAL-AD7866CB, the EVAL-CONTROL BRD2, and a 12 V transformer must be
ordered. See relevant Evaluation Board Technical note for more information.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25
o
C, unless otherwise noted.)
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DRIVE
to DGND . . . . . . . . . . . . . . . . –0.3 V to DV
DD
+ 0.3 V
V
DRIVE
to AGND . . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
AV
DD
to DV
DD
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND . . . . . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . . . . . . . . . –0.3 V to +7 V
V
REF
to AGND . . . . . . . . . . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Digital Output Voltage to DGND . . . –0.3 V to V
DRIVE
+ 0.3 V
Input Current to Any Pin Except Supplies
2
. . . . . . . . . 10 mA
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . . . –40C to +125C
Storage Temperature Range . . . . . . . . . . . . –65C to +150C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 450 mW
JA
Thermal Impedance (TSSOP) . . . . . . . . . . . . . 143C/W
JC
Thermal Impedance (TSSOP) . . . . . . . . . . . . . . 45C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Transient currents of up to 100 mA will not cause SCR latch up.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD7866 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

AD7866ARUZ-REEL

Mfr. #:
Buy AD7866ARUZ-REEL
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Dual 1MSPS 12-Bit 2-Ch SAR
Lifecycle:
New from this manufacturer.
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