RL78/G10 CHAPTER 2 ELECTRICAL SPECIFICATIONS
R01DS0207EJ0100 Rev.1.00
Apr 15, 2013
Page 23 of 28
2.6 Analog Characteristics
2.6.1 A/D converter characteristics
(Target ANI pin : ANI0 to ANI3)
(T
A = −40 to +85°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Resolution RES
8
10 bit
VDD = 5 V
±1.7 ±3.1
Note 2
LSBOverall error
Note 1
AINL 10-bit resolution
V
DD = 3 V
±2.3 ±4.5
Note 2
LSB
2.7 V ≤ VDD ≤ 5.5 V 3.4 18.4 µs
Conversion time tCONV 10-bit resolution
2.4 V ≤ V
DD ≤ 5.5 V 4.6 18.4 µs
VDD = 5 V ±0.19
Note 2
%FSRZero-scale error
Note 1
EZS 10-bit resolution
V
DD = 3 V ±0.39
Note 2
%FSR
VDD = 5 V ±0.29
Note 2
%FSRFull-scale error
Note 1
EFS 10-bit resolution
VDD = 3 V ±0.42
Note 2
%FSR
VDD = 5 V ±1.8
Note 2
LSBIntegral linearity error
Note 1
ILE 10-bit resolution
V
DD = 3 V ±1.7
Note 2
LSB
VDD = 5 V ±1.4
Note 2
LSBDifferential linearity error
Note 1
DLE 10-bit resolution
V
DD = 3 V ±1.5
Note 2
LSB
Analog input voltage VAIN 0 VDD V
Notes 1. Excludes quantization error (±1/2 LSB).
2. This is the characteristic evaluation value plus or minus 3. These values are not used in the shipping
inspection.
2.6.2 SPOR circuit characteristics
(T
A = −40 to +85°C, VSS = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Power supply rise time 4.08 4.28 4.45 V VSPOR0
Power supply fall time 4.00 4.20 4.37 V
Power supply rise time 2.76 2.90 3.02 V VSPOR1
Power supply fall time 2.70 2.84 2.96 V
Power supply rise time 2.44 2.57 2.68 V VSPOR2
Power supply fall time 2.40 2.52 2.62 V
Power supply rise time 2.05 2.16 2.25 V
Detection supply voltage
V
SPOR3
Power supply fall time 2.00 2.11 2.20 V
Minimum pulse width
Note
TSPW 300 µs
Note Time required for the reset operation by the SPOR when VDD becomes under VSPDR.
2.6.3 Power supply voltage rising slop
e characteristics
(TA = −40 to +85°C, VSS = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Power supply voltage rising slope SVDD 54 V/ms
