RL78/G10 CHAPTER 1 OUTLINE
R01DS0207EJ0100 Rev.1.00
Apr 15, 2013
Page 7 of 28
1.5.2 16-pin products
PORT 0
P00 to P07
PORT 4
PORT 12
P121, P122, P125
8
Buzzer/clock
output control
PCLBUZ0
Clock generator
+
Reset generator
RESET
On-chip
TOOL0
BCD
adjustment
On-chip debugger
High-speed
on-chip
oscillator
1.25 to 20
MHz
Low-speed
on-chip
oscillator
15 kHz
Selectable
power-on-
reset
SAU0 (1 ch)
UART0
IIC00
SCL00
SDA00
RxD0
TxD0
6
4
Key return
6 ch
KR0 to KR5
INTP0 to INTP3
ANI0 to ANI6
Low-speed
on-chip
oscillator
PORT 13
P137
8-/10-bit
A/D converter
8 ch
Interrupt
control
4 ch
Watchdog timer
RL78-S1
Interrupt
control
RAM
512 B
Code flash: 4 KB
VDD VSS
P40, P41
2
3
X1 X2/EXCLK
Main OSC
1 to 20 MHz
IICA0
SCLA0
SDAA0
COMP
IVCMP0
IVREF0
VCOUT0
12-bit interval
timer
CSI01
CSI00
SO01
SI00
TAU0 (4 ch)
ch03
ch01
ch00
ch02
TI01 / TO01
TI02 / TO02
TI03 / TO03
SCK00
SO00
SI01
SCK01
TI00 / TO00
RL78/G10 CHAPTER 1 OUTLINE
R01DS0207EJ0100 Rev.1.00
Apr 15, 2013
Page 8 of 28
1.6 Outline of Functions
This outline describes the function at the time when Peripheral I/O redirection register (PIOR) is set to 00H.
10-pin 16-pin Item
R5F10Y16ASP R5F10Y14ASP R5F10Y47ASP R5F10Y46ASP R5F10Y44ASP
Code flash memory 2 KB 1 KB 4 KB 2 KB 1 KB
RAM 256 B 128 B 512 B 256 B 128 B
High-speed system
clock
X1, X2 (crystal/ceramic) oscillation, external
main system clock input (EXCLK):
1 to 20 MHz: V
DD = 2.7 to 5.5 V
1 to 5 MHz: V
DD = 2.0 to 5.5 V
Main
system
clock
High-speed on-chip
oscillator clock
1.25 to 20 MHz (V
DD = 2.7 to 5.5 V)
1.25 to 5 MHz (V
DD = 2.0 to 5.5 V)
Low-speed on-chip oscillator
clock
15 kHz (TYP)
General-purpose register 8-bit register × 8
Minimum instruction execution
time
0.05 μs (20 MHz operation)
Instruction set Data transfer (8 bits)
Adder and subtractor/logical operation (8 bits)
Multiplication (8 bits × 8 bits)
Rotate, barrel shift, and bit manipulation
(set, reset, test, and Boolean operation), etc.
Total 8 14
CMOS I/O 6 (N-ch open-drain output (VDD tolerance): 2) 10 (N-ch open-drain output (VDD tolerance): 4)
I/O port
CMOS input 2 4
16-bit timer 2 channels 4 channels
Watchdog timer 1 channel
12-bit interval timer 1 channel
Timer
Timer output 2 channels (PWM output: 1) 4 channels (PWM outputs: 3
Note 1
)
1 Clock output/buzzer output
2.44 kHz to 10 MHz: (Peripheral hardware clock: f
MAIN = 20 MHz operation)
Comparator — 1
8-/10-bit resolution A/D converter 4 channels 8 channels
Serial interface [10-pin products] CSI: 1 channel/simplified I
2
C: 1 channel/UART: 1 channel
[16-pin products] CSI: 2 channels/simplified I
2
C: 1 channel/UART: 1 channel
I
2
C bus 1 channel
Internal 8 14 Vectored
interrupt
sources
External 3 5
Key interrupt 6
Reset Reset by RESET pin
Internal reset by watchdog timer
Internal reset by selectable power-on-reset
Internal reset by illegal instruction execution
Note 2
Internal reset by data retention lower limit voltage
Selectable power-on-reset circuit Detection voltage: 2.0 V/2.4 V/2.7 V/4.0 V
On-chip debug function Provided
Power supply voltage VDD = 2.0 to 5.5 V
Operating ambient temperature TA = - 40 to + 85 °C
RL78/G10 CHAPTER 1 OUTLINE
R01DS0207EJ0100 Rev.1.00
Apr 15, 2013
Page 9 of 28
Notes 1. The number of outputs varies, depending on the setting of channels in use and the number of the master
(see 6.8.3 Operation as multiple PWM output function in the RL78/G10 User’s Manual).
2. The illegal instruction is generated when instruction code FFH is executed. Reset by the illegal instruction
execution not issued by emulation with the on-chip debug emulator.

R5F10Y16ASP#V0

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU RL78/G10 2+0/256B 10SSOP
Lifecycle:
New from this manufacturer.
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