UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 16 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
[1] Not tested in production; guaranteed by design.
[2] The test circuit used to measure the bus output voltage symmetry (which includes C
SPLIT
) is shown in Figure 10.
V
O(rec)
recessive output voltage CAN Active mode;
V
TXD
= V
IO
; V
BAT
> 5.5 V;
R
(CANH-CANL)
= no load
20.5V
BUF
3V
CAN Offline mode;
V
BAT
> 5.5 V;
R
(CANH-CANL)
= no load
0.1 - +0.1 V
CAN Offline Bias mode;
R
(CANH-CANL)
= no load
22.53V
I
O(dom)
dominant output current CAN Active mode;
V
BAT
> 5.5 V; V
TXD
=0V
pin CANH; V
CANH
=0V 50--mA
pin CANL; V
CANL
=5V - - 52 mA
I
O(rec)
recessive output current V
CANL
= V
CANH
= 27 V to
+32 V; V
TXD
= V
IO
3-+3mA
V
th(RX)dif
differential receiver threshold
voltage
CAN Active mode;
V
CANL
= V
CANH
= 12 V to
+12 V; V
BAT
> 5.5 V
0.5 0.7 0.9 V
CAN Offline mode;
V
CANL
= V
CANH
= 12 V to
+12 V; V
BAT
> 5.5 V
0.4 0.7 1.15 V
V
hys(RX)dif
differential receiver hysteresis
voltage
CAN Active mode;
V
CANL
= V
CANH
= 12 V to
+12 V; V
BAT
> 5.5 V
50 200 400 mV
R
i(cm)
common-mode input resistance 9 15 28 k
R
i
input resistance deviation 1-+1%
R
i(dif)
differential input resistance 19 30 52 k
C
i(cm)
common-mode input
capacitance
[1]
--20pF
C
i(dif)
differential input capacitance
[1]
--10pF
I
LI
input leakage current V
BAT
= V
BUF
=0V or
V
BAT
= V
BUF
= shorted to ground
via 47 k; V
CANH
= V
CANL
=5V
5-+5A
Temperature protection
T
th(act)otp
overtemperature protection
activation threshold temperature
167 177 187 C
T
th(rel)otp
overtemperature protection
release threshold temperature
127 137 147 C
Table 6. Static characteristics …continued
T
vj
=
40
C to +150
C; V
BAT
=4.5V to 28V; V
IO
= 2.85 V to 5.5 V; R
(CANH-CANL)
=60
; all voltages are defined with respect
to ground; positive currents flow into the IC; typical values are given at V
BAT
= 13 V; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 17 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
10. Dynamic characteristics
Table 7. Dynamic characteristics
T
vj
=
40
C to +150
C; V
BAT
=4.5V to 28V; V
IO
= 2.85 V to 5.5 V; R
(CANH-CANL)
=60
; C
(CANH-CANL)
= 100 pF; all voltages
are defined with respect to ground; positive currents flow into the IC; typical values are given at V
BAT
= 13 V; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
Voltage sources; pins BUF and VIO
t
startup
start-up time from V
BAT
exceeding the power-on
detection threshold until V
BUF
>
90 % undervoltage threshold;
C
BUF
=4.7F
-2.84.7ms
t
d(uvd)
undervoltage detection delay time 6 - 54 s
t
d(uvd-sleep)
delay time from undervoltage
detection to sleep mode
from undervoltage detection on
VIO until UJA1162 forced to Sleep
mode
200 - 400 ms
Mode control: pin SLPN
t
fltr(sleep)
sleep filter time 2.5 - 13.5 s
t
d(sleep)
sleep delay time minimum LOW time to trigger a
transition to Sleep mode
21 - 36 s
Pin WAKE
t
det(wake)
wake-up detection time 7 - 42 s
CAN transceiver timing; pins CANH, CANL, TXD and RXD
t
d(TXD-RXD)
delay time from TXD to RXD R
L
=60; C
L
= 100 pF;
50 % V
TXD
to 50 % V
RXD
;
C
RXD
= 15 pF;
f
TXD
= 250 kHz
--255ns
R
L
= 120 ; C
L
= 200 pF;
50 % V
TXD
to 50 % V
RXD
;
C
RXD
= 15 pF;
f
TXD
= 250 kHz
[1]
--350ns
t
d(TXD-busdom)
delay time from TXD to bus dominant - 80 - ns
t
d(TXD-busrec)
delay time from TXD to bus recessive - 80 - ns
t
d(busdom-RXD)
delay time from bus dominant to RXD C
RXD
= 15 pF - 105 - ns
t
d(busrec-RXD)
delay time from bus recessive to RXD C
RXD
= 15 pF - 120 - ns
t
bit(RXD)
bit time on pin RXD t
bit(TXD)
= 500 ns
[2]
400 - 550 ns
t
wake(busdom)
bus dominant wake-up time first pulse (after first recessive) for
wake-up on pins CANH and
CANL;
CAN Offline mode
0.5 - 3.0 s
second pulse for wake-up on pins
CANH and CANL
0.5 - 3.0 s
t
wake(busrec)
bus recessive wake-up time first pulse for wake-up on pins
CANH and CANL;
CAN Offline mode
0.5 - 3.0 s
second pulse (after first dominant)
for wake-up on pins CANH and
CANL
0.5 - 3.0 s
UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 18 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
[1] Guaranteed by design.
[2] See Figure 7
.
t
to(wake)
wake-up time-out time between first and second
dominant pulses; CAN Offline
mode
570 - 1200 s
t
to(dom)TXD
TXD dominant time-out time CAN Active mode;
V
TXD
= 0 V
2.7 - 3.3 ms
t
to(silence)
bus silence time-out time recessive time measurement
started in all CAN modes;
R
L
= 120
0.95 - 1.17 s
t
d(busact-bias)
delay time from bus active to bias - - 200 s
t
startup(CAN)
CAN start-up time when switching to Active mode
(CTS = HIGH)
--220s
Table 7. Dynamic characteristics …continued
T
vj
=
40
C to +150
C; V
BAT
=4.5V to 28V; V
IO
= 2.85 V to 5.5 V; R
(CANH-CANL)
=60
; C
(CANH-CANL)
= 100 pF; all voltages
are defined with respect to ground; positive currents flow into the IC; typical values are given at V
BAT
= 13 V; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
Fig 6. CAN transceiver timing diagram
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UJA1162T,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC TRANSCEIVER 14SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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