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UJA1162T,118

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UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 4 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
5. Pinning information
5.1 Pinning
5.2 Pin description
[1] The exposed die pad at the bottom of the package allows for better heat dissipation and grounding from the
transceiver via the printed circuit board. For enhanced thermal and electrical performance, it is
recommended to solder the exposed die pad to GND.
Fig 2. Pin configuration diagram
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Table 2. Pin description
Symbol Pin Description
TXD 1 transmit data input
GND 2
[1]
ground
BUF 3 5 V transceiver supply voltage
RXD 4 receive data output; reads out data from the bus lines
VIO 5 supply voltage for I/O level adaptor
CTS 6 CAN transceiver status output
INH 7 inhibit output for switching external voltage regulators
i.c. 8 internally connected; should be left floating or connected to GND
WAKE 9 local wake-up input
BAT 10 battery supply voltage
i.c. 11 internally connected; should be left floating or connected to GND
CANL 12 LOW-level CAN bus line
CANH 13 HIGH-level CAN bus line
SLPN 14 Sleep mode control input (active LOW)
UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 5 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
6. Functional description
The UJA1162 is a self-supplied high-speed CAN transceiver incorporating a 5 V CAN
supply. A variety of fail-safe and diagnostic features offer enhanced system reliability and
advanced power management.
6.1 System controller
The system controller is a state machine that manages register configuration and controls
the internal functions of the UJA1162. UJA1162 operating modes and state transitions are
illustrated in Figure 3
. These modes are discussed in more detail in the following sections.
6.1.1 Operating modes
The UJA1162 supports five operating modes: Normal, Standby, Sleep, Overtemp and Off.
6.1.1.1 Normal mode
Normal mode is the active operating mode. In this mode, the UJA1162 is fully operational.
Normal mode can be selected from Standby and Sleep (via Standby) modes by setting pin
SLPN HIGH, provided V
IO
>V
uvd(VIO)
. The UJA1162 exits Normal mode:
• if the microcontroller selects Standby mode by setting pin SLPN LOW
• if the UJA1162 detects an undervoltage on VIO, causing the UJA1162 to switch to
Standby mode
• if the chip temperature rises above T
th(act)otp
, causing the UJA1162 to switch to
Overtemp mode
• if the battery supply voltage drops below V
th(det)poff
, causing the UJA1162 to switch to
Off mode
All pending wake-up events (power-on, CAN bus wake-up, local wake-up via the WAKE
pin) are cleared when the UJA1162 enters Normal mode.
UJA1162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 17 April 2014 6 of 29
NXP Semiconductors
UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
6.1.1.2 Standby mode
Standby mode is a transitional mode between Normal and Sleep modes. The transceiver
is unable to transmit or receive data in Standby mode, but pin INH is active.
The receiver monitors bus activity for a wake-up request in Standby mode. The bus pins
are biased at GND level (via R
i(cm)
) when the bus is inactive for t > t
to(silence)
and at
approximately 2.5 V when there is activity on the bus (autonomous biasing). Wake-up can
be triggered remotely via a standard wake-up pattern on the CAN bus (see Section 6.3.2
)
or locally via the WAKE pin. Pin RXD is forced LOW when a bus or local wake-up event is
detected.
The UJA1162 switches to Standby mode:
• from Normal mode if pin SLPN goes LOW or and undervoltage is detected on VIO
• from Sleep mode in the event of a local or remote wake-up event or if SLPN = HIGH
(with a valid voltage on VIO)
(1) SLPN = HIGH is only possible in Sleep mode if a valid V
IO
supply voltage is connected
Fig 3. UJA1162 system controller state diagram
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UJA1162T,118

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Buy UJA1162T,118
Manufacturer:
NXP Semiconductors
Description:
IC TRANSCEIVER 14SOIC
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