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AT25128N1-10SI-1.8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
1
8-lead SOIC
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
Features
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1)
• Low-voltage and Standard-voltage Operation
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
• 3 MHz Clock Rate
• 64-byte Page Mode and Byte Write Operation
• Block Write Protection
– Protect 1/4, 1/2, or Entire Array
• Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
• Self-timed Write Cycle (5 ms Typical)
• High-reliability
– Endurance: 100,000 Write Cycles
– Data Retention: >200 Years
• Automotive Grade, Extended Temperature and Lead-Free Devices Available
• 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead and 16-lead JEDEC SOIC, 14-lead and 20-lead
TSSOP, and 8-lead Leadless Array Packages
Description
The AT25128/256 provides 131,072/262,144 bits of serial electrically-erasable pro-
grammable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits
each. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available in
space saving 8-lead PDIP (AT25128/256), 8-lead EIAJ SOIC (AT25128/256), 8-lead
and 16-lead JEDEC SOIC (AT25128), 14-lead TSSOP (AT25128), 20-lead TSSOP
(AT25128/256), and 8-lead Leadless Array (AT25256) packages. In addition, the entire
family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configuration
Pin Name Function
CS Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND Ground
VCC Power Supply
WP
Write Protect
HOLD
Suspends Serial
Input
NC No Connect
DC Don't Connect
Rev. 0872O–SEEPR–03/05
*Note: Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSOP socket compatibility.
SPI Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT25128
(1)
AT25256
(2)
Notes: 1. This device is not rec-
ommended for new
designs. Please refer
to AT25128A.
2. This device is not rec-
ommended for new
designs. Please refer
to AT25256A.
20-lead TSSOP*
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
CS
SO
SO
NC
NC
WP
GND
DC
NC
NC
VCC
HOLD
HOLD
NC
NC
SCK
SI
DC
NC
8-lead PDIP
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
16-lead SOIC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CS
SO
NC
NC
NC
NC
WP
GND
VCC
HOLD
NC
NC
NC
NC
SCK
SI
14-lead TSSOP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
CS
SO
NC
NC
NC
WP
GND
VCC
HOLD
NC
NC
NC
SCK
SI
8-lead Leadless Array
Bottom View
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
2
AT25128/256
0872O–SEEPR–03/05
The AT25128/256 is enabled through the Chip Select pin (CS) and accessed via a 3-
wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All programming cycles are completely self-timed, and no separate Erase
cycle is required before Write.
Block Write protection is enabled by programming the status register with top ¼, top ½
or entire array of write protection. Separate Program Enable and Program Disable
instructions are provided for additional data protection. Hardware data protection is pro-
vided via the WP
pin to protect against inadvertent write attempts to the status register.
The HOLD
pin may be used to suspend any serial communication without resetting the
serial sequence.
Figure 1. Block Diagram
Absolute Maximum Ratings*
Operating Temperature..................................–55°C to +125°C
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Storage Temperature .....................................–65°C to +150°C
Voltage on Any Pin
with Respect to Ground ....................................–1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
16384/32768 x 8
3
AT25128/256
0872O–SEEPR–03/05
Note: 1. This parameter is characterized and is not 100% tested.
Note: 1. V
IL
and V
IH
max are reference only and are not tested.
Table 2. Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted)
Symbol Test Conditions Max Units Conditions
C
OUT
Output Capacitance (SO) 8 pF V
OUT
= 0V
C
IN
Input Capacitance (CS, SCK, SI, WP, HOLD)6pFV
IN
= 0V
Table 3. DC Characteristics
Applicable over recommended operating range from T
AI
= –40°C to +85°C, V
CC
= +1.8V to +5.5V,
T
AE
= –40°C to +125°C, V
CC
= +1.8V to +5.5V(unless otherwise noted)
Symbol Parameter Test Condition Min Typ Max Units
V
CC1
Supply Voltage 1.8 5.5 V
V
CC2
Supply Voltage 2.7 5.5 V
V
CC3
Supply Voltage 4.5 5.5 V
I
CC1
Supply Current V
CC
= 5.0V at 1 MHz, SO = Open, Read 2.0 3.0 mA
I
CC2
Supply Current
V
CC
= 5.0V at 2 MHz,
SO = Open, Read, Write
3.0 5.0 mA
I
SB1
Standby Current V
CC
= 1.8V, CS = V
CC
0.1 2.0 µA
I
SB2
Standby Current V
CC
= 2.7V, CS = V
CC
0.2 2.0 µA
I
SB3
Standby Current V
CC
= 5.0V, CS = V
CC
2.0 5.0 µA
I
IL
Input Leakage V
IN
= 0V to V
CC
–3.0 3.0 µA
I
OL
Output Leakage V
IN
= 0V to V
CC
, T
AC
= 0°C to 70°C –3.0 3.0 µA
V
IL
(1)
Input Low-voltage –1.0 V
CC
x 0.3 V
V
IH
(1)
Input High-voltage V
CC
x 0.7 V
CC
+ 0.5 V
V
OL1
Output Low-voltage
4.5 ≤ V
CC
≤ 5.5V
I
OL
= 3.0 mA 0.4 V
V
OH1
Output High-voltage I
OH
= –1.6 mA V
CC
- 0.8 V
V
OL2
Output Low-voltage
1.8V ≤ V
CC
≤ 3.6V
I
OL
= 0.15 mA 0.2 V
V
OH2
Output High-voltage I
OH
= –100 µA V
CC
- 0.2 V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

AT25128N1-10SI-1.8

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Buy AT25128N1-10SI-1.8
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Description:
IC EEPROM 128K SPI 16SOIC
Lifecycle:
New from this manufacturer.
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