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ADCLK948BCPZ

P1-P3P4-P6P7-P9P10-P12P13-P13
ADCLK948 Data Sheet
Rev. B | Page 12 of 12
OUTLINE DIMENSIONS
1
0.50
BSC
BOTTOM VIEWTOP VIEW
PIN 1
INDICATOR
32
9
16
17
24
25
8
EXPOSED
PAD
PIN 1
INDICATOR
SEATING
PLANE
0.05 MAX
0.02 NOM
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.50
0.40
0.30
0.20 MIN
2.85
2.70 SQ
2.55
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD-2.
08-22-2013-A
PKG-004332
Figure 24. 32-Lead Lead Frame Chip Scale Package [LFCSP]
5 mm × 5 mm Body and 0.75 mm Package Height
(CP-32-21)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
ADCLK948BCPZ −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-21
ADCLK948BCPZ-REEL7 −40°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP] CP-32-21
ADCLK948/PCBZ
Evaluation Board
1
Z = RoHS Compliant Part.
©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08280-0-8/16(B)
P1-P3P4-P6P7-P9P10-P12P13-P13

ADCLK948BCPZ

Mfr. #:
Buy ADCLK948BCPZ
Manufacturer:
Analog Devices Inc.
Description:
Clock Buffer 8 LVPECL Outpts SiGe
Lifecycle:
New from this manufacturer.
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