NOIL1SM0300A
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22
PIN LIST
Table 14. PINLIST
Pin No. Name Type Description
1 GND
ADC
Ground Ground supply of the ADCs
2 DATA<5> Output Databit<5>
3 DATA<6> Output Databit<6>
4 DATA<7> Output Databit<7>
5 DATA<8> Output Databit<8>
6 DATA<9> Output Databit<9> (MSB)
7 GND
D
Ground Digital ground supply
8 V
DDD
Supply Digital power supply (2.5V)
9 GND
ADC
Ground Ground supply of the ADCs
10 V
ADC
Supply Power supply of the ADCs (2.5V)
11 GND
A
Ground Ground supply of analog readout circuitry
12 V
DDA
Supply Power supply of analog readout circuitry (2.5V)
13 ADC_BIAS Biasing
Biasing of ADCs. Connect with 10 kW to VADC and decouple with
100n to GND_ADC
14 BIAS4 Biasing
Biasing of amplifier stage. Connect with 110 kW to VDDA and de-
couple with 100 nF to GNDA
15 BIAS3 Biasing
Biasing of columns. Connect with 42 kW to VDDA and decouple with
100 nF to GNDA
16 BIAS2 Biasing
Biasing of columns. Connect with 1.5 MW to VDDA and decouple with
100 nF to GNDA.
17 BIAS1 Biasing
Biasing of imager core. Connect with 500 kW to VDDA and decouple
with 100 nF to GNDA
18 VPIX Supply Power supply of pixel array (2.5V)
19 SPI_ENABLE Digital input Enable of the SPI
20 SPI_CLK Digital input Clock of the SPI. (Max. 20 MHz)
21 SPI_DATA Digital I/O Data line of the SPI. Bidirectional pin
22 VMEM_H Supply Supply of vmem_high of pixelarray (3.3V)
23 GND_DRIVERS Ground Ground of pixel array drivers
24 VRESET_1 Supply Reset supply voltage (typical 3.3V)
25 VRESET_2 Supply Dual slope reset supply voltage. Connect to other supply or ground
when dual slope reset is not used
26 VRESET_3 Supply Triple slope reset supply voltage. Connect to other supply or ground
when triple slope reset is not used
27 PRECHARGE_BIAS Bias
Connect with 68 kW to VPIX and decouple with 100 nF to GND_DRIV-
ERS
28 LINE_VALID Digital output Indicates when valid data is at the outputs. Active high
29 FRAME_VALID Digital output Indicates when valid frame is readout
30 INT_TIME_3 Digital I/O In master mode: Output to indicate the triple slope integration time. In
slave mode: Input to control the triple slope integration time
31 INT_TIME_2 Digital I/O In master mode: Output to indicate the dual slope integration time. In
slave mode: Input to control the dual slope integration time
32 INT_TIME_1 Digital I/O In master mode: Output to indicate the integration time
In slave mode: Input to control integration time
33 V
DDD
Supply Digital power supply (2.5V)
