10
Table 3. EEPROM Serial ID Memory Contents at address A0
Addr Hex ASCII Addr Hex ASCII Addr Hex ASCII Addr Hex ASCII
0 03 40 41 A 68 Note 3 96 Note 5
1 04 41 42 B 69 Note 3 97 Note 5
2 00 42 43 C 70 Note 3 98 Note 5
3 00 43 55 U 71 Note 3 99 Note 5
4 00 44 2D - 72 Note 3 100 Note 5
5 00 45 35 5 73 Note 3 101 Note 5
6 08 46 37 7 74 Note 3 102 Note 5
7 00 47 Note 1 75 Note 3 103 Note 5
8 00 48 Note 1 76 Note 3 104 Note 5
9 00 49 Note 1 77 Note 3 105 Note 5
10 00 50 Note 1 78 Note 3 106 Note 5
11 01 51 Note 1 79 Note 3 107 Note 5
12 0D 52 20 80 Note 3 108 Note 5
13 00 53 20 81 Note 3 109 Note 5
14 00 54 20 82 Note 3 110 Note 5
15 00 55 20 83 Note 3 111 Note 5
16 00 56 20 84 Note 4 112 Note 5
17 00 57 20 85 Note 4 113 Note 5
18 64 58 20 86 Note 4 114 Note 5
19 00 59 20 87 Note 4 115 Note 5
20 41 A 60 00 88 Note 4 116 Note 5
21 56 V 61 00 89 Note 4 117 Note 5
22 41 A 62 00 90 Note 4 118 Note 5
23 47 G 63 Note 2 91 Note 4 119 Note 5
24 4F O 64 00 92 00 120 Note 5
25 20 65 Note 1 93 00 121 Note 5
26 20 66 00 94 00 122 Note 5
27 20 67 00 95 Note 2 123 Note 5
28 20 124 Note 5
29 20 125 Note 5
30 20 126 Note 5
31 20 127 Note 5
32 20
33 20
34 20
35 20
36 01
37 00
38 17
39 6A
Notes:
1. The contents of these registers will change dependent on model number.
2. Addresses 63 and 95 are check sums. Address 63 is the check sum for bytes 0-62 and address 95 is the check sum for bytes 64-94.
3. Address 68-83 specify a unique identi er.
4. Address 84-91 specify the date code.
5. These elds are reserved for optional use by Avago Technologies.
11
Table 4. Summary of Internal IC Registers
Register Description
0 Control
1 Status
2-3 N/A for SFP Module
4 Auto-Negotiation Advertisement
5 Auto-Negotiation Link Partner Ability
6 Auto-Negotiation Expansion
7 Auto-Negotiation Next Page Transmit
8 Auto-Negotiation Link Partner Received Next Page
9 MASTER-SLAVE Control Register
10 MASTER-SLAVE Status Register
11-15 N/A for SFP Module
16 Extended Control 1
17 Extended Status 1
18-19 N/A for SFP Module
20 Extended Control 2
21 Receive Error Counter
22 Cable Diagnostic 1
23-25 N/A for SFP Module
26 Extended Control 3
27 Extended Status 2
28 Cable Diagnostic 2
29-31 N/A for SFP Module
Internal ASIC Registers
The ASIC (or “PHY”, for Physical Layer IC) in the trans-
ceiver module contains 32 registers. Each register
contains 16 bits. The registers are summarized in
table 11 and detailed in table 12 through 28. Each bit
is either Read Only (RO) or Read/Write (R/W). Some
bits are also described as Latch High (LH) or Latch
Low (LL) and/or Self Clearing (SC).
The registers are accessible through the 2-wire se-
rial CMOS EEPROM protocol of the ATMEL AT24C01A
or equivalent. The address of the PHY is 1010110x,
where x is the R/W bit. Each register’s address is
000yyyyy, where yyyyy is the binary equivalent of the
register number. Write and read operations must send
or receive 16 bits of data, so the “multi-page” access
protocol must be used.
12
Table 5. Register 0 (Control)
Bit Name Description
Hardware
Reset
Software
Reset Details
0.15R/W Reset 1 = PHY reset
0 = Normal Operation
0 self-clearing Performs software reset
0.14R/W Loopback 1 = Enable
0 = Disable
0 0 Serial data in on RD+/- is deserial-
ized, then reserialized and sent
out on TD+/-
0.13R/W Speed Selection
(LSB)
0 = 1000 Mb/s 0 Update Paired with bit 0.6. Module may
function at speeds other than
1000 MB/s depending on model
This bit is only meaningful if bit
0.12 is 0.
0.12R/W Auto-Negotiation
Enable
1 = Enable
0 = Disable
1 Update Changes to this bit take e ect
after software reset.
0.11R/W Power Down 1 = Power Down
0 = Normal Operation
00
0.10R/W Isolate 1 = Isolate
0 = Normal Operation
00
0.9R/W/SC Restart Auto-
Negotiation
1 = Restart Auto-Nego-
tiation Process
0 = normal operation
0 Self-clearing
0.8R/W Duplex Mode 1 = Full Duplex
0 = Half Duplex
1 Update This bit is only meaningful if 0.12
is 0.
0.7R/W Collision Test 1 = enable COL signal
test
0 = disable COL signal
test
00
0.6R/W Speed Selection
(MSB)
1 = 1000 Mb/s 1 Update Paired with bit 0.13. Module may
function at speeds other than
1000 MB/s depending on model
This bit is only meaningful if bit
0.12 is 0.
0.5:0R/W N/A to SFP Module 000000 000000

ABCU-5730ARZ

Mfr. #:
Manufacturer:
Description:
Fiber Optic Transmitters, Receivers, Transceivers CU B2 LOS ENBLD SGMII DISAB-40+85C
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