19
Table 14. Register 16 (Extended Control 1)
Bit Name Description
Hardware
Reset
Software
Reset Details
16.15:7
R/W
N/A to SFP Module 000000000 Retain (15:10, 7)
or Update (9:8)
When writing to register 16,
be sure to preserve the values
of these bits. Changes to
these values can interrupt the
normal operation of the SFP
module.
16.6:5
R/W
MDI Crossover Mode 00 = Manual MDI
con guration
01 = Manual MDIX
con guration
10 = N/A to SFP
module
11 = Enable
automatic crossover
11 Update Changes to this bit take e ect
after software reset.
16.4:0
R/W
N/A to SFP Module 11000 Retain (2:0) or
Update (4:3)
When writing to register 16,
be sure to preserve the values
of these bits. Changes to
these values can interrupt the
normal operation of the SFP
module.
20
Table 15. Register 17 (Extended Status 1)
Bit Name Description
Hardware
Reset
Software
Reset Details
17.15:14
RO
Speed 10 = 1000 Mbps
01 = 100 Mbps
00 = 10 Mbps
0 Retain This bit is only valid after bit 17.11
is set.
17.13
RO
Duplex 1 = Full duplex
0 = Half duplex
0 Retain This bit is only valid after bit 17.11
is set.
17.12
RO/LH
Page Received 1 = Page received
0 = Page not received
00
17.11
RO
Speed and
Duplex Resolved
1 = Resolved
0 = Speed not resolved
0 0 This bit is set when auto-nego-
tiation is either completed or
disabled.
17.10
RO
Link 1 = Link up
0 = Link down
00
17.9:7
RO
Cable Length 000 = < 50 m
001 = 50 - 80 m
010 = 80 - 110 m
011 = 110 - 140 m
100 = > 140 m
000 000
17.6
RO
MDI Crossover
Status
1 = Crossover
0 = No crossover
0 0 Crossover means that pairs A+/-
(pins 1 & 2 on the RJ45 jack) and
B+/- (pins 3 & 6) are interchanged
and C+/- (pins 4 &5) and D+/- (pins
7 & 8) are interchanged. This bit is
only valid after bit 17.11 is set.
17.5:4
RO
N/A to SFP Module 00 00
17.3
RO
MAC Transmit
Pause Enabled
1 = Transmit pause
enabled
0 = Transmit pause
disabled
0 0 This bit re ects the capability of the
MAC to which the module is con-
nected on the serial side. This bit is
only valid after bit 17.11 is set.
17.2
RO
MAC Receive
Pause Enabled
1 = Receive pause
enabled
0 = Receive pause
disabled
0 0 This bit re ects the capability of the
MAC to which the module is con-
nected on the serial side. This bit is
only valid after bit 17.11 is set.
17.1
RO
Polarity 1 = Polarity reversed
0 = Polarity not reversed
0 0 This bit is set if any of the four
twisted pairs have the + and - wires
reversed.
17.0
RO
Jabber 1 = Jabber detected
0 = No jabber detected
0
21
Table 16. Register 20 (Extended Control 2)
Bit Name Description
Hardware
Reset
Software
Reset Details
20.15
RO
Link down on no idles 1 = Link lock lost
0 = Link lock intact
0 0 If idle patterns are not seen
within 1 ms, link lock is lost and
link is brought down.
20.14:4
R/W
N/A to SFP Module 00011000110 0001100110 When writing to register 20, be
sure to preserve the values of
these bits. Changes to these
values can interrupt the normal
operation of the SFP module.
20.3 Reserved N/A to SFP
module
This bit must be read and left
R/W unchanged when per-
forming a write.
20.2:0R/W N/A to SFP Module 000 000 When writing to register 20, be
sure to preserve the values of
these bits. Changes to these
values can interrupt the normal
operation of the SFP module.
Table 17. Register 21 (Receive Error Counter)
Bit Name Description
Hardware
Reset
Software
Reset Details
21.15:0
RO/SC
Receive errors Counts errors received
on the 1000BASE-T side
0 0 These bits do not
roll over when they are all
ones.
Table 18. Register 22 (Cable Diagnostic 1)
Bit Name Description
Hardware
Reset
Software
Reset Details
22.15:2
RO
N/A to SFP Module
22.1:0
R/W
MDI Pair Select 00 = Pins 1 & 2 (Channel A)
01 = Pins 3 & 6 (Channel B)
10 = Pins 4 & 5 (Channel C)
11 = Pins 7 & 8 (Channel D)
For VCT results, choose the
twisted pair on which regis-
ter 28 will dsiplay.

ABCU-5730ARZ

Mfr. #:
Manufacturer:
Description:
Fiber Optic Transmitters, Receivers, Transceivers CU B2 LOS ENBLD SGMII DISAB-40+85C
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