CS5463
34 DS678F3
6.1.23 Fundamental Reactive Power Register ( Q
H
)
Address: 31 (read only)
Fundamental Reactive Power (Q
H
) is calculated by performing a discrete Fourier transform (DFT) at the relevant
frequency on the V and I channels. The value is represented in two's complement notation and in the range of
-1.0
Q
H
1.0, with the binary point to the right of the MSB.
6.1.24 Page Register
Address: 31 (write only)
Default = 0x00
Determines which register page the serial port will access.
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
MSB LSB
2
6
2
5
2
4
2
3
2
2
2
1
2
0
CS5463
DS678F3 35
6.2 Page 1 Registers
6.2.1 Energy Pulse Output Width ( PulseWidth
)
Address: 0
Default = 1
PulseWidth sets the duration of energy pulses (t
PW
). The actual pulse duration is the contents of PulseWidth
divided by the output word rate (OWR). PulseWidth is an integer in the range of 1 to 8388607.
6.2.2 No Load Threshold ( Load
Min
)
Address: 1
Default = 0
Load
Min
is used to set the no load threshold. When the magnitude of the P
Active
register is less than Load
Min
,
the active energy pulse output will be disabled. Load
Min
is a two's complement value in the range of
-1.0
Load
Min
1.0, with the binary point to the right of the MSB. Negative values are not used.
6.2.3 Temperature Gain Register ( T
Gain
)
Address: 2
Default = 0x2F03C3 = 23.5073471
Sets the temperature channel gain. Temperature gain (T
Gain
) is utilized to convert from one temperature scale
to another. The Celsius scale (
o
C) is the default. Values will be within in the range of 0 T
Gain
128. The value
is represented in unsigned notation, with the binary point to the right of bit 7th MSB. See Section 5.8
On-chip
Temperature Sensor
on page 19.
6.2.4 Temperature Offset Register ( T
Off
)
Address: 3
Default = 0xF3D35A = -0.0951126
Temperature offset (T
off
) is used to remove the temperature channel’s offset at the zero-degree reading. Values
are represented in two's complement notation and in the range of -1.0
T
off
1.0, with the binary point to the
right of the MSB.
MSB LSB
02
22
2
21
2
20
2
19
2
18
2
17
2
16
.....
2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
MSB LSB
2
6
2
5
2
4
2
3
2
2
2
1
2
0
2
-1
.....
2
-11
2
-12
2
-13
2
-14
2
-15
2
-16
2
-17
MSB LSB
-(2
0
)2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23
CS5463
36 DS678F3
6.3 Page 3 Registers
6.3.1 Voltage Sag and Current Fault Duration Registers ( VSAG
Duration
, ISAG
Duration
)
Address: 6 (Voltage Sag Duration); 10 (Current Fault Duration)
Default = 0x000000
Voltage Sag Duration (VSAG
Duration
) and Current Fault Duration (ISAG
Duration
) defines the number of instanta-
neous measurements utilized to determine a sag event. Setting these register to zero will disable this feature.
The value is represented in unsigned notation. See Section 5.6
Sag and Fault Detect Feature on page 19.
6.3.2 Voltage Sag and Current Fault Level Registers ( VSAG
Level
, ISAG
Level
)
Address: 7 (Voltage Sag Level ); 11 (Current Fault Level )
Default = 0x000000
Voltage Sag Level (VSAG
Level
) and Current Fault Level (ISAG
Level
) defines the voltage level that the magnitude
of input samples, averaged over the sag duration, must fall below in order to register a sag/fault condition. These
value are represented in unsigned notation and in the range of 0
VSAG
Level
1.0, with the binary point to the
right of the third MSB. See Section 5.6
Sag and Fault Detect Feature on page 19.
MSB LSB
0
2
22
2
21
2
20
2
19
2
18
2
17
2
16
.....
2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSB LSB
02
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
.....
2
-17
2
-18
2
-19
2
-20
2
-21
2
-22
2
-23

CS5463-ISZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Current & Power Monitors & Regulators IC Single Phase PWR/Energy
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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