CS3301
10 DS595F3
2. GENERAL DESCRIPTION
The CS3301 is a low-noise chopper-stabilized
CMOS differential input, differential output ampli-
fier for precision analog signals between DC and
2 kHz. It has multiplexed inputs, rough/fine charge
outputs, and programmable gains of x1, x2, x4, x8,
x16, x32, and x64.
The amplifier’s performance makes it ideal for
low-frequency, high dynamic range applications
requiring low distortion and minimal power con-
sumption. It’s optimized for use in acquisition sys-
tems designed around the CS5371/72 single/dual
∆Σ modulators and the CS5376A quad digital fil-
ter. Figure 3 shows the system architecture of a 4-
channel acquisition system using four CS3301, two
CS5372, one CS4373A, and one CS5376A.
2.1 Analog Signals
2.1.1 Analog Inputs
The amplifier analog inputs are designed for differ-
ential sensors. Input multiplexing simplifies sys-
tem connections by providing separate inputs for a
sensor and test DAC (INA, INB) as well as an in-
ternal termination for noise tests. The MUX0,
MUX1 digital pins determine which multiplexed
input is connected to the amplifier.
2.1.2 Analog Outputs
The amplifier analog outputs are separated into
rough charge / fine charge signals to easily connect
to the CS5371/72 inputs. Each output also includes
a series resistor, requiring only two differential ca-
pacitors to create the CS5371/72 input anti-alias
filter.
∆Σ
Modulator
∆Σ
Modulator
Digital Filter
AMP
AMP
AMP
AMP
Geophone
or
Hydrophone
Sensor
Geophone
or
Hydrophone
Sensor
Geophone
or
Hydrophone
Sensor
Geophone
or
Hydrophone
Sensor
M
U
X
M
U
X
M
U
X
M
U
X
Test
DAC
µController
or
Configuration
EEPROM
Communication
Interface
CS3301
CS3302
CS5371
CS5371
CS5376A
CS4373A
System Telemetry
CS3301
CS3302
CS3301
CS3302
CS3301
CS3302
CS5372
CS5372
Switch
MUX
Switch
MUX
Figure 3. Multi-Channel System Architecture
CS3301
DS595F3 11
2.1.3 Differential Signals
Analog signals into and out of the CS3301 are dif-
ferential, consisting of two halves with equal but
opposite magnitude varying about a common mode
voltage.
A full scale 5 Vpp differential signal centered on a
-0.15 V common mode can have:
SIG+ = -0.15 V + 1.25 V = 1.1 V
SIG- = -0.15 V - 1.25 V = -1.4 V
SIG+ is +2.5 V relative to SIG-
For the reverse case:
SIG+ = -0.15 V - 1.25 V = -1.4 V
SIG- = -0.15 V + 1.25 V = 1.1 V
SIG+ is -2.5 V relative to SIG-
The total swing for SIG+ relative to SIG- is
(+2.5 V) - (-2.5 V) = 5 V
pp
. A similar calculation
can be done for SIG- relative to SIG+. Note that a
5V
pp
differential signal centered on a -0.15 V
common mode voltage never exceeds 1.1 V and
never drops below -1.4 V on either half of the sig-
nal.
By definition, differential voltages are to be mea-
sured with respect to the opposite half, not relative
to ground. A multimeter differentially measuring
between SIG+ and SIG- in the above example
would properly read 1.767 V
rms
, or 5 V
pp
.
2.2 Digital Signals
2.2.1 Clock Input
The clock signal is used by the chopper-
stabilization circuitry of the amplifier analog in-
puts. The CLK pin can be driven by an external
clock source for synchronous operation, or CLK
can be grounded to run from its own internally gen-
erated clock signal. The CLK pin is connected to a
clock detect circuit which will disable the internal
clock and use an external clock if one is supplied.
If the internal clock signal is to be used, the CLK
pin should be connected to DGND.
2.2.2 Gain Selection
The CS3301 supports gain ranges of x1, x2, x4, x8,
x16, x32, and x64. They are selected using the
GAIN0, GAIN1, and GAIN2 pins as shown in
Table 1 on page 8.
2.2.3 Mux Selection
The analog inputs to the amplifier are multiplexed,
with external signals applied to the INA+, INA- or
INB+, INB- pins. An internal termination is also
available for noise tests. Input mux selection is
made using the MUX0 and MUX1 pins as shown in
Table 1 on page 8.
Although a mux selection is provided to enable the
INA and INB switches simultaneously, significant
current should not be driven through them in this
mode. The CS3301 mux switches will maintain
good linearity only with minimal signal currents.
2.2.4 Low Power Selection
For applications where power is critical, a low-
power mode can be selected. This mode reduces
amplifier power consumption at the expense of
slightly degraded performance. Low power mode
is selected using the LPWR pin, which is active
high.
2.2.5 Power Down Selection
A power-down mode is available to shut down the
amplifier when not in use. When enabled, all inter-
nal circuitry is disabled, the analog inputs and out-
puts go high-impedance, and the device enters a
micro-power state. Power down mode is selected
using the PWDN pin, which is active high.
2.3 Power Supplies
2.3.1 Analog Power Supplies
The analog power pins of the CS3301 are to be sup-
plied with a total of 5 V between VA+ and VA-.
This voltage is typically from a bipolar
±2.5 V
power supply. When using bipolar power supplies,
the analog signal common mode voltage should be
biased to 0 V. The analog power supplies are rec-
CS3301
12 DS595F3
ommended to be bypassed to system ground using
0.1 µF X7R type capacitors.
The VA- supply is connected to the CMOS sub-
strate and as such must remain the most negative
applied voltage to prevent potential latch-up condi-
tions. Care should be taken to ensure analog input
voltages do not drop more than -0.3 V below the
VA- supply. Care should also be taken to establish
the VA- supply before analog signals are applied to
the device. It is recommended to clamp the VA-
supply to system ground using a reversed biased
Schottky diode to prevent possible latch-up condi-
tions related to mismatched supply rail initializa-
tion.
2.3.2 Digital Power Supplies
The digital power supply across the VD and DGND
pins is flexible and can be set to interface with 3.3V
or 5V logic. The digital power supply should be by-
passed to system ground using a 0.01 µF X7R type
capacitor.

CS3301-ISZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Differential Amplifiers IC Geophone Lw Noise Prgmbl Gn Dfif Amp
Lifecycle:
New from this manufacturer.
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