E-TDA7590 Datasheet E-TDA7590, E-TDA7590TR | P28-P30

Appendix 1 TDA7590

28/42

essi0_tde equ $36

essi0_tue equ $38

essi0_tls equ $3a

;ESSI 1 interrupt equates

essi1_rdf equ $40

essi1_roe equ $42

essi1_rls equ $44

essi1_tde equ $46

essi1_tue equ $48

essi1_tls equ $4a

;Register Addresses of ESSI0

M_TX00 EQU $FFFFBC ; SSI0 Transmit Data Register 0

M_TX01 EQU $FFFFBB ; SSI0 Transmit Data Register 1

M_TX02 EQU $FFFFBA ; SSI0 Transmit Data Register 2

M_TSR0 EQU $FFFFB9 ; SSI0 Time Slot Register

M_RX0 EQU $FFFFB8 ; SSI0 Receive Data Register

M_SSISR0 EQU $FFFFB7 ; SSI0 Status Register

M_CRB0 EQU $FFFFB6 ; SSI0 Control Register B

M_CRA0 EQU $FFFFB5 ; SSI0 Control Register A

M_TSMA0 EQU $FFFFB4 ; SSI0 Transmit Slot Mask Register A

M_TSMB0 EQU $FFFFB3 ; SSI0 Transmit Slot Mask Register B

M_RSMA0 EQU $FFFFB2 ; SSI0 Receive Slot Mask Register A

M_RSMB0 EQU $FFFFB1 ; SSI0 Receive Slot Mask Register B

;Register Addresses of ESSI1

M_TX10 EQU $FFFFAC ; SSI1 Transmit Data Register 0

M_TX11 EQU $FFFFAB ; SSI1 Transmit Data Register 1

M_TX12 EQU $FFFFAA ; SSI1 Transmit Data Register 2

M_TSR1 EQU $FFFFA9 ; SSI1 Time Slot Register

M_RX1 EQU $FFFFA8 ; SSI1 Receive Data Register

M_SSISR1 EQU $FFFFA7 ; SSI1 Status Register

M_CRB1 EQU $FFFFA6 ; SSI1 Control Register B

M_CRA1 EQU $FFFFA5 ; SSI1 Control Register A

M_TSMA1 EQU $FFFFA4 ; SSI1 Transmit Slot Mask Register A

M_TSMB1 EQU $FFFFA3 ; SSI1 Transmit Slot Mask Register B

M_RSMA1 EQU $FFFFA2 ; SSI1 Receive Slot Mask Register A

M_RSMB1 EQU $FFFFA1 ; SSI1 Receive Slot Mask Register B

;------------------------------------------------------------------------

; EQUATES for SCI

;------------------------------------------------------------------------

PCRE_ADR EQU $FFFF9F ; Serial Port Control Register

PRRE_ADR EQU $FFFF9E ; Serial Port Direction Register

PDRE_ADR EQU $FFFF9D ; Serial Port Direction Register

SCR_ADR EQU $FFFF9C ; SCI Control Register

SCCR_ADR EQU $FFFF9B ; SCI Clock Control Register

SRXH_ADR EQU $FFFF9A ; Serial Recieve Register high

SRXM_ADR EQU $FFFF99 ; Serial Recieve Register mid

SRXL_ADR EQU $FFFF98 ; Serial Recieve Register low

STXH_ADR EQU $FFFF97 ; Serial Transmit Register high

STXM_ADR EQU $FFFF96 ; Serial Transmit Register mid

STXL_ADR EQU $FFFF95 ; Serial Transmit Register low

STXA_ADR EQU $FFFF94 ; Serial Transmit Adress Register

SSR_ADR EQU $FFFF93 ; Serial Status Register

TDA7590 Appendix 1

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;------------------------------------------------------------------------

; EQUATES for Expansion Port

;------------------------------------------------------------------------

EXP_BCR EQU $FFFFFB ; Bus Control Register address

EXP_AAR0 EQU $FFFFF9 ; Address Attribte Register (AAR0) address

EXP_AAR1 EQU $FFFFF8 ; Address Attribte Register (AAR1) address

EXP_AAR2 EQU $FFFFF7 ; Address Attribte Register (AAR2) address

EXP_AAR3 EQU $FFFFF6 ; Address Attribte Register (AAR3) address

EXT_RAM_STARTEQU $C00000

;------------------------------------------------------------------------

; EQUATES for Extended Memory

;------------------------------------------------------------------------

EOC_ADR EQU $FFFFCA

;*******************************************************************************

;***************************** Initialisation Values **************************

;*******************************************************************************

;-------------------------------------------------------------------------------

; CODEC Intitialisation values

;-------------------------------------------------------------------------------

; --- INIT_CCR -----------------------------------------------------------------

; settings fro the CODEC Control Register

; 321098765432109876543210

INIT_CODEC_CSR EQU %000000001110011011011011 ; $00E6DB DACgain = 0dB - ADCgain = +0dBdB

; 011 --- GADCL[0:2]

; 011 ------ GADCR[0:2]

; 011 --------- GDACL[0:2]

; 011 ------------ GDACR[0:2]

; 0 --------------- MUTEDAC (1=Mute)

; 1 ---------------- PDNDAC (1=pwrdwn)

; 1 ----------------- PDNADC (1=pwrdwn)

; 1 ------------------ NRST (0=reset)

;-------------------------------------------------------------------------------

; SAI Intitialisation values

;-------------------------------------------------------------------------------

;--- INIT_RCS ------------------------------------------------------------------

; settings for the Receiver Control/Status Register

; 321098765432109876543210

INIT_SAI_RCS EQU %000000000001000101001001 ; $000149

; 1 --- R0EN (0:Disbaled; 1:Enabled)

; 0 ---- R1EN (0:Disbaled; 1:Enabled)

; 0 ----- R2EN (0:Disbaled; 1:Enabled)

; 1 ------ RMME (1:Master mode; 0:Slave mode)

; 0 ------- Reserved

; 10 -------- RWL[0:1] (00:16; 01:24; 10:32)

; 0 ---------- RDIR (0:MSB 1st; 1:LSB 1st)

; 1 ----------- RLRS (0:LRCKR=0-LW; 1:LRCKR=0-RW)

; 0 ------------ RCKP (0:-ve ; 1:+ve)

; 0 ------------- RREL (0:trans-1st; 1:I2S)

; 0 -------------- RDWJ

; 1 --------------- RXIE (0:Disabled; 1:Enabled)

; 0 ---------------- Reserved

; 0 ----------------- ROFL

Appendix 1 TDA7590

30/42

; 0 ------------------ RDR

; 0 ------------------- ROFCL

;--- INIT_TCS ------------------------------------------------------------------

; settings for the Transmitter Control/Status Register

; 321098765432109876543210

INIT_SAI_TCS EQU %000000000001010101001001 ; $000549 - non incrociato

; 1 --- T0EN (0:Disbaled; 1:Enabled)

; 0 ---- T1EN (0:Disbaled; 1:Enabled)

; 0 ----- T2EN (0:Disbaled; 1:Enabled)

; 1 ------ TMME (1:Master mode; 0:Slave mode)

; 0 ------- reserved

; 10 -------- TWL[0:1] (00:16; 01:24; 10:32)

; 0 ---------- TDIR (0:MSB 1st; 1:LSB 1st)

; 1 ----------- TLRS (0:LRCKR=0-LW; 1:LRCKR=0-RW)

; 0 ------------ TCKP (0:-ve ; 1:+ve)

; 1 ------------- TREL (0:trans-1st; 1:I2S)

; 0 -------------- TDWE

; 1 --------------- TXIE (0:Disabled; 1:Enabled)

; 0 ---------------- Reserved

; 0 ----------------- TUFL

; 0 ------------------ TDE

; 0 ------------------- TUFCL

;-------------------------------------------------------------------------------

; PLL Intitialisation values

;-------------------------------------------------------------------------------

IF 1 ; Settings per sci 115200

;--- PLL_CSR -------------------------------------------------------------------

; settings for the PLL control register

; 321098765432109876543210

; settings for the PLL control register

; 321098765432109876543210

;INIT_PLL_CSR EQU $0E0C00

INIT_PLL_CSR EQU %000011100000110000000000 ; $0E0C00

; 00000 --- IDF =0 (actual = IDF+1=1)

; 0 -------- RESERVED

; 0 --------- LOCK (read only; 0:out of lock)

; 0 ---------- OUTLOCK (read only; 0:in lock)

; 0001100 ----------- MF =12 (actual = MF + 1 = 13)

; 0 ------------------ PLLIE (0:intr disable)

; 0 ------------------- PWRDN (1:power down mode)

; 1 -------------------- DITEN (0:disable)

; 1 --------------------- FRACTN (0:disable)

; 1 ---------------------- PEN (1:PLL enable)

;--- FRACT ---------------------------------------------------------------------

; settings for the Fractional N part of the PLL

; 321098765432109876543210

;INIT_PLL_FCR EQU $0034bd

INIT_PLL_FCR EQU %000000000011010010111101 ; $0034bd

; 01110000101001 --- FRACT = 13501

;--- CLKCTL --------------------------------------------------------------------

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P36 P37-P39 P40-P42

E-TDA7590

Mfr. #:

Buy E-TDA7590

Manufacturer:

STMicroelectronics

Description:

Digital Signal Processors & Controllers - DSP, DSC Digital signal IC speech and audio

Lifecycle:

New from this manufacturer.

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E-TDA7590

E-TDA7590

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