AX8052F100
www.onsemi.com
2
GPIO
• 24 GPIO Pins
• PB0−PB7, PC0−PC3 and PR0−PR5 5 V Tolerant Inputs
• All GPIO Pins Support Individually Programmable
Pull−ups and Interrupt on Change
• Flexible Allocation of GPIO Pins to Peripherals
16−bit General Purpose Timer (3x)
• Saw Tooth and Triangle Modes
• Sigma−Delta Mode Converts Timer into a DAC
• Optional Double Buffering of the PERIOD Register
allows Controlled Frequency Changes
• Optional High−byte Buffering allows Atomic 16−bit
Accesses
• Flexible Clocking Options, can use any Internal or an
External Clock Source
• Pre−scaler Included
16−bit Output Compare Unit (2x)
• Used together with a General Purpose Timer to create
PWM Waveforms
• Optional Double Buffering
16−bit Input Capture Unit (2x)
• Used together with a General Purpose Timer to time
Events on an External or Internal Signal
UART (2x)
• 5−9 bit Word Length, 1−2 Stop Bits
• Uses One of the General Purpose Timers as Baud Rate
Generator
Dedicated Radio Master SPI Interface
• Compatible to AX RF and other Peripherals
• Efficient CPU Access
• Easy Access to Transceiver Registers by Mapping
Transceiver Registers into X Address Space
• Transceiver Crystal may clock MCU
Master/Slave SPI
• Supports 3 and 4 Wire Variants
ADC
• 10−bit 500 kSamples/s ADC
• Up to 8 Channels
• Single Ended and Differential Sampling
• x0.1, x1 and x10 Gain Amplifier
• Internal 1 V Reference
• Flexibly Programmable Conversion Schedule
• Built−in Temperature Sensor
Analog Comparators
• Internal and External Reference
• Output Signal may be Routed to GPIO, Read by
Software, or Used as Input Capture Trigger
DMA Controller
• 2 Independent DMA Channels
• Moves Data between X−RAM and most On−chip
Peripherals
• Cycle−steal and Round−robin Memory Arbitration
ensure Minimal Impact on AX8052 Core
• Chained Buffer Descriptors allow Arbitrarily Elaborate
Buffering Schemes and Flexible Interrupt Generation
AES
• Dedicated AES Crypto Controller
• Dedicated DMA Engine to fetch Input Data and Key
Stream from X−RAM and Strobe Output Data into
X−RAM
• Multi Megabit/s Data Rates
• Supports AES−128, AES−192 and AES−256
International Standards
• Programmable Round Number and Software Key
Schedule Generation allow Longer Key Lengths for
Higher Security Applications
• ECB, CFB and OFB Chaining Modes
NOTE: The AES engine requires software enabling and
support.
True Random Number Generator (RNG)
• Cryptographic Random Numbers
NOTE: The random number generator requires software
enabling and support.
Applications
• Ultra−low Power Microcontroller Applications,
especially in Conjunction with AXRadio IC
• Sensor Applications
• Home Automation
• Automatic Meter Reading
• Remote Keyless Entry
• Active RFID
• Wireless Audio
