74LVT16500A_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 29 May 2006 12 of 19
Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
Measurements points are given in Table 8.
V
OL
and V
OH
are typical voltage output drop that occur with the output load.
Fig 6. Propagation delay clock (CPAB, CPBA) to output (An, Bn), clock (CPAB, CPBA)
pulse width and maximum clock frequency (
CPAB, CPBA)
Measurements points are given in Table 8.
V
OL
and V
OH
are typical voltage output drop that occur with the output load.
Fig 7. Propagation delay latch enable (LEAB, LEBA) to output (An, Bn) and latch enable
(LEAB, LEBA) pulse width
Measurements points are given in Table 8.
V
OH
is typical voltage output drop that occur with the output load.
Fig 8. 3-state output enable time to HIGH-level and output disable time from HIGH-level
001aaf037
input CPBA
or CPAB
t
PHL
t
PLH
t
WH
t
WL
V
OH
V
I
0 V
V
OL
V
M
V
M
V
M
V
M
1/f
max
output An or Bn
001aad310
V
M
V
M
V
M
V
M
V
M
t
PLH
t
PHL
t
WH
input LEAB
or LEBA
output
An or Bn
V
OH
V
OL
V
I
0 V
001aad344
output
An or Bn
V
M
V
Y
V
M
t
PHZ
t
PZH
V
M
V
OH
V
I
0 V
0 V
OEBA
input
OEAB
