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74LVT16500ADGG,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
74LVT16500A_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 29 May 2006 6 of 19
Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
6. Functional description
[1] H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the enable or clock transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the enable or clock transition;
NC = no change;
X = don’t care;
Z = high-impedance OFF-state;
↓ = HIGH-to-LOW enable or clock transition.
B3 49 data input/output B3
V
CC
50 supply voltage
B2 51 data input/output B2
B1 52 data input/output B1
GND 53 ground (0 V)
B0 54 data input/output B0
CPAB 55 A-to-B clock input (active falling edge)
GND 56 ground (0 V)
Table 2. Pin description
…continued
Symbol Pin Description
Table 3. Function table
[1]
Operating mode Control Input Internal
register
Output
OEAB LEAB CPAB An Bn
OEBA LEBA CPBA Bn An
disabled L H X X X Z
disabled, latch data L ↓ XhHZ
disabled, latch data L ↓ Xl LZ
disabled, hold data L L H or L X NC Z
disabled, clock data L L ↓ hHZ
disabled, clock data L L ↓ lLZ
transparent H H X H H H
transparent H H X L L L
latch data and display H ↓ XhHH
latch data and display H ↓ Xl LL
clock data and display H L ↓ hHH
clock data and display H L ↓ lLL
hold data and display H L H or L X H H
hold data and display H L H or L X L L
74LVT16500A_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 29 May 2006 7 of 19
Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
7. Limiting values
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings
are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage −0.5 +4.6 V
V
I
input voltage
[1]
−0.5 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
−0.5 +7.0 V
I
IK
input clamping current V
I
< 0 V - −50 mA
I
OK
output clamping current V
O
< 0 V - −50 mA
I
O
output current output in LOW-state - 128 mA
output in HIGH-state - −64 mA
T
stg
storage temperature −65 +150 °C
T
j
junction temperature
[2]
- 150 °C
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 2.7 - 3.6 V
V
I
input voltage 0 - 5.5 V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
I
OH
HIGH-level output current - - −32 mA
I
OL
LOW-level output current none - - 32 mA
current duty cycle ≤ 50 %;
f
i
≥ 1 kHz
- - 64 mA
∆t/∆V input transition rise and
fall rate
outputs enabled - - 10 ns/V
T
amb
ambient temperature in free air −40 - +85 °C
74LVT16500A_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 29 May 2006 8 of 19
Philips Semiconductors
74LVT16500A
3.3 V 18-bit universal bus transceiver; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
T
amb
= −40 °C to 85 °C
[1]
V
IK
input clamping voltage V
CC
= 2.7 V; I
IK
= −18 mA - −0.85 −1.2 V
V
OH
HIGH-level output voltage V
CC
= 2.7 V to 3.6 V; I
OH
= −100 µAV
CC
− 0.2 V
CC
-V
V
CC
= 2.7 V; I
OH
= −8 mA 2.4 2.55 - V
V
CC
= 3.0 V; I
OH
= −32 mA 2.0 2.3 - V
V
OL
LOW-level output voltage V
CC
= 2.7 V
I
OL
= 100 µA - 0.07 0.2 V
I
OL
= 24 mA - 0.3 0.5 V
V
CC
= 3.0 V
I
OL
= 16 mA - 0.25 0.4 V
I
OL
= 32 mA - 0.3 0.5 V
I
OL
= 64 mA - 0.36 0.55 V
V
RST
power-up output low voltage V
CC
= 3.6 V; I
O
= 1 mA; V
I
=V
CC
or GND
[2]
- 0.1 0.55 V
I
LI
input leakage current
control pins V
CC
= 3.6 V; V
I
= V
CC
or GND - 0.1 ±1 µA
V
CC
= 0 V or 3.6 V; V
I
= 5.5 V - 0.1 10 µA
I/O data pins V
CC
= 3.6 V
[3]
V
I
= 5.5 V - 1.0 20 µA
V
I
= V
CC
- 0.1 10 µA
V
I
= 0 V - +0.1 −5 µA
I
OFF
power-off leakage current V
CC
= 0 V; V
I
or V
O
= 0 V to 4.5 V - 1.0 ±100 µA
I
HOLD
bus hold current data input V
CC
= 3 V
[4]
V
I
= 0.8 V 75 130 - µA
V
I
= 2.0 V −75 −130 - µA
V
I
= 0 V to 3.6 V; V
CC
= 3.6 V ±500 - - µA
I
EX
external current into output output in the HIGH-state when V
O
> V
CC
;
V
O
= 5.5 V; V
CC
= 3.0 V
- 50 125 µA
I
O(pu/pd)
power-up/power-down
output current
V
CC
≤ 1.2 V; V
O
= 0.5 V to V
CC
; V
I
= GND
or V
CC
; OEAB or OEBA don’t care
[5]
-40±100 µA
I
CC
quiescent supply current V
CC
= 3.6 V; V
I
= GND or V
CC
; I
O
= 0 A
outputs HIGH-state - 0.07 0.12 mA
outputs LOW-state - 4 6 mA
outputs disabled
[6]
- 0.07 0.12 mA
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74LVT16500ADGG,112

Mfr. #:
Buy 74LVT16500ADGG,112
Manufacturer:
NXP Semiconductors
Description:
Bus Transceivers 3.3V 18-BIT UNIVRSAL
Lifecycle:
New from this manufacturer.
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