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24LC65/SM

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
© 2008 Microchip Technology Inc. DS21073K-page 13
24AA65/24LC65/24C65
FIGURE 8-2: CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY
FIGURE 8-3: CACHE WRITE TO THE ARRAY STARTING AT A NON-PAGE BOUNDARY
1
Write command initiated at byte 0 of page 3 in the array;
First data byte is loaded into the cache byte 0.
2 64 bytes of data are loaded into cache.
3
Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
4 Remaining pages in cache are written
to sequential pages in array.
cache
byte 0
cache
byte 1
• • •
cache
byte 7
cache page 1
bytes 8-15
• • •
page 0
cache page 2
bytes 16-23
cache page 7
bytes 56-63
page 1 page 2 • • • byte 7 • • •
page 4 • • • page 7page 3
cache page 0
Last page in cache written to page 2 in next row.
5
array row n
array row n + 1
page 0 page 1 page 2
byte 0 byte 1 page 4 page 7
1 Write command initiated; 64 bytes of data
loaded into cache starting at byte 2 of page 0.
2 Last 2 bytes loaded 'roll over'
to beginning.
3
Last 2 bytes
loaded into
page 0 of cache.
4 Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
cache
byte 1
cache
byte 2
• • •
cache
byte 7
cache page 1
bytes 8-15
• • •
page 0
cache page 2
bytes 16-23
cache page 7
bytes 56-63
page 1 page 2 • • • • • •
page 4 • • • page 7page 3
Remaining bytes in cache are
written sequentially to array.
5
array
row n
array
row
n + 1
cache
byte 0
Last 3 pages in cache written to next row in array.
6
page 1 page 2
byte 0 byte 2byte 1
page 4 page 7
byte 7byte 3 byte 4
page 0
24AA65/24LC65/24C65
DS21073K-page 14 © 2008 Microchip Technology Inc.
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
XXXXXXXX
T/XXXNNN
YYWW
8-Lead PDIP (300 mil)
Example:
8-Lead SOIJ (5.28 mm)
Example:
24LC65
0110017
I/SM
24LC65
I/P017
0310
XXXXXXXX
YYWWNNN
T/XXXXXX
* Standard PICmicro device marking consists of Microchip part number, year code, week code, and
traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check
with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP
price.
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
© 2008 Microchip Technology Inc. DS21073K-page 15
24AA65/24LC65/24C65
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
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1,21!'!&$& "!**&"&&!
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6&! 7,8.
'!9'&! 7 7: ;
7"')%! 7 <
& 1,
&& = = 
##44!!   - 
1!&&   = =
"#&"#>#& .  - -
##4>#& .   <
: 9& -< -? 
&& 9  - 
9#4!! <  
69#>#& )  ? 
9*9#>#& )  < 
: *+ 1 = = -
N
E1
NOTE 1
D
12
3
A
A1
A2
L
b1
b
e
E
eB
c
  * ,<1
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

24LC65/SM

Mfr. #:
Buy 24LC65/SM
Manufacturer:
Microchip Technology
Description:
EEPROM 8kx8 2.5V Smart
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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