Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
46
Hardware Activation of the Boot Loader
The boot loader can also be executed by holding PSEN LOW,
EA
greater than V
IH
(such as +5 V), and ALE HIGH (or not connected)
at the falling edge of RESET. This is the same effect as having a
non-zero status byte. This allows an application to be built that will
normally execute the end user’s code but can be manually forced
into ISP operation.
If the factory default setting for the Boot Vector (0FCH) is changed, it
will no longer point to the ISP masked-ROM boot loader code. If this
happens, the only way it is possible to change the contents of the
Boot Vector is through the parallel programming method, provided
that the end user application does not contain a customized loader
that provides for erasing and reprogramming of the Boot Vector and
Status Byte.
After programming the Flash, the status byte should be programmed
to zero in order to allow execution of the user’s application code
beginning at address 0000H.
+5 V (+12 V tolerant)
+5 V
TxD
RxD
V
SS
V
PP
V
CC
TxD
RxD
RST
XTAL2
XTAL1
SU01615
V
SS
V
CC
P89C51RA2xx
P89C51RB2xx
P89C51RC2xx
P89C51RD2xx
Figure 41. In-System Programming with a Minimum of Pins
In-System Programming (ISP)
The In-System Programming (ISP) is performed without removing
the microcontroller from the system. The In-System Programming
(ISP) facility consists of a series of internal hardware resources
coupled with internal firmware to facilitate remote programming of
the P89C51RA2/RB2/RC2/RD2xx through the serial port. This
firmware is provided by Philips and embedded within each
P89C51RA2/RB2/RC2/RD2xx device.
The Philips In-System Programming (ISP) facility has made in-circuit
programming in an embedded application possible with a minimum
of additional expense in components and circuit board area.
The ISP function uses five pins: TxD, RxD, V
SS
, V
CC
, and V
PP
(see
Figure 41). Only a small connector needs to be available to interface
your application to an external circuit in order to use this feature.
The V
PP
supply should be adequately decoupled and V
PP
not
allowed to exceed datasheet limits.
Free ISP software is available from the Embedded Systems
Academy: “FlashMagic”
1. Direct your browser to the following page:
http://www.esacademy.com/software/flashmagic/
2. Download Flashmagic
3. Execute “flashmagic.exe” to install the software
Using the In-System Programming (ISP)
The ISP feature allows for a wide range of baud rates to be used in
your application, independent of the oscillator frequency. It is also
adaptable to a wide range of oscillator frequencies. This is
accomplished by measuring the bit-time of a single bit in a received
character. This information is then used to program the baud rate in
terms of timer counts based on the oscillator frequency. The ISP
feature requires that an initial character (an uppercase U) be sent to
the P89C51RA2/RB2/RC2/RD2xx to establish the baud rate. The
ISP firmware provides auto-echo of received characters.
Once baud rate initialization has been performed, the ISP firmware
will only accept Intel Hex-type records. Intel Hex records consist of
ASCII characters used to represent hexadecimal values and are
summarized below:
:NNAAAARRDD..DDCC<crlf>
In the Intel Hex record, the “NN” represents the number of data
bytes in the record. The P89C51RA2/RB2/RC2/RD2xx will accept
up to 16 (10H) data bytes. The “AAAA” string represents the
address of the first byte in the record. If there are zero bytes in the
record, this field is often set to 0000. The “RR” string indicates the
record type. A record type of “00” is a data record. A record type of
“01” indicates the end-of-file mark. In this application, additional
record types will be added to indicate either commands or data for
the ISP facility. The maximum number of data bytes in a record is
limited to 16 (decimal). ISP commands are summarized in Table 9.
As a record is received by the P89C51RA2/RB2/RC2/RD2xx, the
information in the record is stored internally and a checksum
calculation is performed. The operation indicated by the record type
is not performed until the entire record has been received. Should
an error occur in the checksum, the P89C51RA2/RB2/RC2/RD2xx
will send an “X” out the serial port indicating a checksum error. If the
checksum calculation is found to match the checksum in the record,
then the command will be executed. In most cases, successful
reception of the record will be indicated by transmitting a “.”
character out the serial port (displaying the contents of the internal
program memory is an exception).
In the case of a Data Record (record type 00), an additional check is
made. A “.” character will NOT be sent unless the record checksum
matched the calculated checksum and all of the bytes in the record
Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
47
were successfully programmed. For a data record, an “X” indicates
that the checksum failed to match, and an “R” character indicates
that one of the bytes did not properly program. It is necessary to
send a type 02 record (specify oscillator frequency) to the
P89C51RA2/RB2/RC2/RD2xx before programming data.
The ISP facility was designed to that specific crystal frequencies
were not required in order to generate baud rates or time the
programming pulses. The user thus needs to provide the
P89C51RA2/RB2/RC2/RD2xx with information required to generate
the proper timing. Record type 02 is provided for this purpose.
Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
48
Table 9. Intel-Hex Records Used by In-System Programming
RECORD TYPE COMMAND/DATA FUNCTION
00 Program Data
:nnaaaa00dd....ddcc
Where:
nn = number of bytes (hex) in record
aaaa = memory address of first byte in record
dd....dd = data bytes
cc = checksum
Example:
:10008000AF5F67F0602703E0322CFA92007780C3FD
01 End of File (EOF), no operation
:xxxxxx01cc
Where:
xxxxxx = required field, but value is a “don’t care”
cc = checksum
Example:
:00000001FF
03 Miscellaneous Write Functions
:nnxxxx03ffssddcc
Where:
nn = number of bytes (hex) in record
xxxx = required field, but value is a “don’t care”
03 = Write Function
ff = subfunction code
ss = selection code
dd = data input (as needed)
cc = checksum
Subfunction Code = 01 (Erase 8K/16K Code Blocks)
ff = 01
ss = block code as shown below:
block 0, 0k to 8k, 00H
block 1, 8k to 16k, 20H (RB2, RC2, RD2)
block 2, 16k to 32k, 40H (RC2, RD2)
block 3, 32k to 48k, 80H (RD2 only)
block 4, 48k to 64k, C0H (RD2 only)
Example:
:0200000301C03A erase block 4
Subfunction Code = 04 (Erase Boot Vector and Status Byte)
ff = 04
ss = don’t care
Example:
:020000030400F7 erase boot vector and status byte
Subfunction Code = 05 (Program Security Bits)
ff = 05
ss = 00 program security bit 1 (inhibit writing to Flash)
01 program security bit 2 (inhibit Flash verify)
02 program security bit 3 (disable external memory)
Example:
:020000030501F5 program security bit 2
Subfunction Code = 06 (Program Status Byte or Boot Vector)
ff = 06
ss = 00 program status byte
01 program boot vector
02 program FX2 bit (dd = 80)
dd = data
Example 1:
:030000030601FCF7 program boot vector with 0FCH
Example 2:
:0300000306028072 program FX2 bit (select 12-clock mode)

P89C51RD2BBD/01,55

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 64KB FLASH 44LQFP
Lifecycle:
New from this manufacturer.
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