Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
52
IAP CALL PARAMETER
PROGRAM SECURITY BITS Input Parameter:
R0 = osc freq (integer)
R1 = 05h or R1 = 85h (WDT feed)
DPH = 00h
DPL = 00h , security bit #1
DPL = 01h , security bit #2
DPL = 02h , security bit #3
Return Parameter:
ACC = 00 if pass , !=0 if fail
PROGRAM STATUS BYTE Input Parameter:
R0 = osc freq (integer)
R1 = 06h or R1 = 86h (WDT feed)
DPH = 00h
DPL = 00H - program status byte
ACC = status byte
Return Parameter:
ACC = 00 if pass , !=0 if fail
PROGRAM BOOT VECTOR Input Parameter:
R0 = osc freq (integer)
R1 = 06h or R1 = 86h (WDT feed)
DPH = 00h
DPL = 01H - program boot vector
ACC = boot vector
Return Parameter:
ACC = 00 if pass , !=0 if fail
PROGRAM 6–CLK/12–CLK
CONFIGURATION BIT
(New function)
Input Parameter:
R0 = osc freq (integer)
R1 = 06h or R1 = 86h (WDT feed)
DPH = 00h
DPL = 02H - program config bit
ACC = 80H (MSB = 6clk/12clk bit)
Return Parameter:
ACC = 00 if pass , !=0 if fail
PROGRAM DATA BLOCK
(New function)
Input Parameter:
R0 = osc freq (integer)
R1 = 0Dh or R1 = 8Dh (WDT feed)
DPTR = address of byte to program
(valid addresses = 0001h~0FFFh)
ACC = data
Return Parameter:
ACC = 00 if pass , !=0 if fail
READ DEVICE DATA Input Parameter:
R0 = osc freq (integer)
R1 = 03h or R1 = 83h (WDT feed)
DPTR = address of byte to read
Return Parameter:
ACC = value of byte read
READ DATA BLOCK
(New function)
Input Parameter:
R0 = osc freq (integer)
R1 = 0Eh or R1 = 8Eh (WDT feed)
DPTR = address of byte to read
(valid addresses = 0001h~0FFFh)
Return Parameter:
ACC = value of byte read
READ MANUFACTURER ID Input Parameter:
R0 = osc freq (integer)
R1 = 00h or R1 = 80h (WDT feed)
DPH = 00h
DPL = 00h - read manufacturer ID
Return Parameter:
ACC = value of byte read
Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
53
IAP CALL PARAMETER
READ DEVICE ID #1 Input Parameter:
R0 = osc freq (integer)
R1 = 00h or R1 = 80h (WDT feed)
DPH = 00h
DPL = 01h - read device ID #1
Return Parameter:
ACC = value of byte read
READ DEVICE ID #2 Input Parameter:
R0 = osc freq (integer)
R1 = 00h or R1 = 80h (WDT feed)
DPH = 00h
DPL = 02h - read device ID #2
Return Parameter:
ACC = value of byte read
READ SECURITY BITS Input Parameter:
R0 = osc freq (integer)
R1 = 07h or R1 = 87h (WDT feed)
DPH = 00h
DPL = 00h - read lock byte
Return Parameter:
ACC = value of byte read
READ STATUS BYTE Input Parameter:
R0 = osc freq (integer)
R1 = 07h or R1 = 87h (WDT feed)
DPH = 00h
DPL = 01h - read status byte
Return Parameter:
ACC = value of byte read
READ BOOT VECTOR Input Parameter:
R0 = osc freq (integer)
R1 = 07h or R1 = 87h (WDT feed)
DPH = 00h
DPL = 02h - read boot vector
Return Parameter:
ACC = value of byte read
READ CONFIG
(New function)
Input Parameter:
R0 = osc freq (integer)
R1 = 00h or R1 = 80h (WDT feed)
DPH = 00h
DPL = 03h - read config byte
Return Parameter:
ACC = value of byte read
READ REVISION
(New function)
Input Parameter:
R0 = osc freq (integer)
R1 = 00h or R1 = 80h (WDT feed)
DPH = 00h
DPL = 80h - read revision of ROM Code
Return Parameter:
ACC = value of byte read
Philips Semiconductors Preliminary data
P89C51RA2/RB2/RC2/RD2xx80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
54
Security
The security feature protects against software piracy and prevents the contents of the Flash from being read. The Security Lock bits are located
in Flash. The P89C51RA2/RB2/RC2/RD2xx has three programmable security lock bits that will provide different levels of protection for the
on-chip code and data (see Table 11).
Table 11.
SECURITY LOCK BITS
1
PROTECTION DESCRIPTION
LEVEL LB1 LB2 LB3
PROTECTION
DESCRIPTION
1 0 0 0 MOVC instructions executed from external program memory are disabled from fetching code
bytes from internal memory.
2 1 0 0 Block erase is disabled. Erase or programming of the status byte or boot vector is disabled.
3 1 1 0 Verify of code memory is disabled.
4 1 1 1 External execution is disabled.
NOTE:
1. Security bits are independent of each other. Full-chip erase may be performed regardless of the state of the security bits.
2. Any other combination of lock bits is undefined.
3. Setting LBx doesn’t prevent programming of unprogrammed bits.

P89C51RD2BBD/01,55

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 64KB FLASH 44LQFP
Lifecycle:
New from this manufacturer.
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