CS5341-DZZR Datasheet CS5341-CZZ, CS5341-DZZ, CS5341-CZZR | P1-P3

http://www.cirrus.com

105 dB, 192 kHz, Multi-Bit Audio A/D Converter

Features

 Advanced Multi-bit Delta-Sigma Architecture

 24-bit Conversion

 Supports All Audio Sample Rates Including

192 kHz

 105 dB Dynamic Range at 5 V

 -98 dB THD+N

 90 mW Power Consumption

 High-Pass Filter to Remove DC Offsets

 Analog/Digital Core Supplies from 3.3 V to 5 V

 Supports Logic Levels between 1.8 V and 5 V

 Auto-Detect Mode Selection in Slave Mode

 Auto-Detect MCLK Divider

General Description

The CS5341 is a complete analog-to-digital converter

for digital audio systems. It performs sampling, analog-

to-digital conversion, and anti-alias filtering, generating

24-bit values for both left and right inputs in serial form

at sample rates up to 200 kHz per channel.

The CS5341 uses a 5th-order, multi-bit Delta-Sigma

modulator followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The CS5341 is available in a 16-pin TSSOP package

for Commercial (-10° to +70° C) and Automotive grades

(-40° to +85° C). The CDB5341 Customer Demonstra-

tion Board is also available for device evaluation and

implementation suggestions. Please refer to “Ordering

Information” on page 22 for complete ordering

information.

The CS5341 is ideal for audio systems requiring wide

dynamic range, negligible distortion and low noise, such

as set-top boxes, DVD-karaoke players, DVD record-

ers, A/V receivers, and automotive applications.

High-Pass

Filter

Low-Latency

Digital Filters

High-Pass

Filter

Serial Port

3.3 V to 5 V

Internal

Reference

Voltages

Switch-Cap

ADC

3.3 V to 5 V

1.8 V to 5 V

Auto-detect

MCLK Divider

Slave Mode

Auto-detect

Master Clock

Reset

Single-Ended

Analog Input

Low-Latency

Digital Filters

Switch-Cap

ADC

Mode

Configuration

Single-Ended

Analog Input

SCLK

LRCK

SDOUT

FILT+

AINR

AINL

March '08

DS564F2

Confidential Draft

3/11/08

CS5341

2 DS564F2

CS5341

Confidential Draft

3/11/08

TABLE OF CONTENTS

1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 4

SPECIFIED OPERATING CONDITIONS ............................................................................................... 4

ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 4

ANALOG CHARACTERISTICS - COMMERCIAL GRADE .................................................................... 5

ANALOG CHARACTERISTICS - AUTOMOTIVE GRADE ..................................................................... 6

DIGITAL FILTER CHARACTERISTICS .................................................................................................7

DC ELECTRICAL CHARACTERISTICS .............................................................................................. 10

DIGITAL CHARACTERISTICS ............................................................................................................. 10

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT ............................................................... 11

2. PIN DESCRIPTION .............................................................................................................................. 13

3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 14

4. APPLICATIONS ................................................................................................................................... 15

4.1 Single-, Double-, and Quad-Speed Modes .....................................................................................15

4.2 Operation as Either a Clock Master or Slave ................................................................................. 15

4.2.1 Operation as a Clock Master ................................................................................................. 16

4.2.2 Operation as a Clock Slave with Auto-Detect ....................................................................... 16

4.2.3 Master Clock ......................................................................................................................... 17

4.3 Serial Audio Interface ..................................................................................................................... 17

4.4 Power-Up Sequence ...................................................................................................................... 18

4.5 Analog Connections ....................................................................................................................... 18

4.6 Grounding and Power Supply Decoupling ......................................................................................18

4.7 Synchronization of Multiple Devices ............................................................................................... 18

4.8 Capacitor Size on the Reference Pin (FILT+) ................................................................................19

5. PARAMETER DEFINITIONS ................................................................................................................ 20

6. PACKAGE DIMENSIONS ................................................................................................................... 21

THERMAL CHARACTERISTICS .......................................................................................................... 21

7. ORDERING INFORMATION ................................................................................................................ 22

8. REVISION HISTORY ............................................................................................................................ 22

DS564F2 3

CS5341

Confidential Draft

3/11/08

LIST OF FIGURES

Figure 1.Single-Speed Mode Stopband Rejection ...................................................................................... 8

Figure 2.Single-Speed Mode Stopband Rejection ...................................................................................... 8

Figure 3.Single-Speed Mode Transition Band (Detail) ................................................................................ 8

Figure 4.Single-Speed Mode Passband Ripple .......................................................................................... 8

Figure 5.Double-Speed Mode Stopband Rejection ..................................................................................... 8

Figure 6.Double-Speed Mode Stopband Rejection ..................................................................................... 8

Figure 7.Double-Speed Mode Transition Band (Detail) .............................................................................. 9

Figure 8.Double-Speed Mode Passband Ripple ......................................................................................... 9

Figure 9.Quad-Speed Mode Stopband Rejection ....................................................................................... 9

Figure 10.Quad-Speed Mode Stopband Rejection ..................................................................................... 9

Figure 11.Quad-Speed Mode Transition Band (Detail) ............................................................................... 9

Figure 12.Quad-Speed Mode Passband Ripple ......................................................................................... 9

Figure 13.Master Mode, Left-Justified SAI ................................................................................................ 12

Figure 14.Slave Mode, Left-Justified SAI .................................................................................................. 12

Figure 15.Master Mode, I²S SAI ................................................................................................................ 12

Figure 16.Slave Mode, I²S SAI .................................................................................................................. 12

Figure 17.Typical Connection Diagram ..................................................................................................... 14

Figure 18.CS5341 Master Mode Clocking ................................................................................................ 16

Figure 19.I²S Serial Audio Interface .......................................................................................................... 17

Figure 20.Left-Justified Serial Audio Interface .......................................................................................... 17

Figure 21.CS5341 Recommended Analog Input Buffer ............................................................................ 18

Figure 22.CS5341 THD+N versus Frequency .......................................................................................... 19

LIST OF TABLES

Table 1. Speed Modes and the Associated Output Sample Rates (Fs) .................................................... 15

Table 2. CS5341 Mode Control ................................................................................................................. 15

Table 3. Master Clock (MCLK) Ratios ....................................................................................................... 17

Table 4. Master Clock (MCLK) Frequencies for Standard Audio Sample Rates ...................................... 17

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P22

CS5341-DZZR

Mfr. #:

Buy CS5341-DZZR

Manufacturer:

Cirrus Logic

Description:

Audio A/D Converter ICs IC 105dB 192 kHz Multi-bit Audio ADC

Lifecycle:

New from this manufacturer.

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CS5341-DZZR

CS5341-DZZR

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