AD7858ARZ Datasheet AD7858BRZ, AD7858ARZ, AD7858LARZ | P1-P3

FUNCTIONAL BLOCK DIAGRAM

SAR AND ADC

CONTROL

CHARGE

REDISTRIBUTION

DAC

BUF

2.5V

REFERENCE

T/H

I/P

MUX

COMP

CALIBRATION

MEMORY AND

CONTROLLER

SERIAL INTERFACE/CONTROL REGISTER

AD7858/

AD7858L

AGND

AIN1

AIN8

REF

/REF

OUT

REF1

REF2

CAL

SYNC

DIN DOUT SCLK

DGND

CLKIN

CONVST

BUSY

SLEEP

REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

3 V to 5 V Single Supply, 200 kSPS

8-Channel, 12-Bit Sampling ADC

AD7858/AD7858L

FEATURES

Specified for V

of 3 V to 5.5 V

AD7858—200 kSPS; AD7858L—100 kSPS

System and Self-Calibration with Autocalibration on

Power-Up

Eight Single-Ended or Four Pseudo-Differential Inputs

Low Power

AD7858: 12 mW (V

= 3 V)

AD7858L: 4.5 mW (V

= 3 V)

Automatic Power-Down After Conversion (25 ␮W)

Flexible Serial Interface:

8051/SPI™/QSPI™/␮P Compatible

24-Lead DIP, SOIC, and SSOP Packages

APPLICATIONS

Battery-Powered Systems (Personal Digital Assistants,

Medical Instruments, Mobile Communications)

Pen Computers

Instrumentation and Control Systems

High-Speed Modems

GENERAL DESCRIPTION

The AD7858/AD7858L are high-speed, low-power, 12-bit

ADCs that operate from a single 3 V or 5 V power supply, the

AD7858 being optimized for speed and the AD7858L for low

power. The ADC powers up with a set of default conditions at

which time it can be operated as a read-only ADC. The ADC

contains self-calibration and system calibration options to en-

sure accurate operation over time and temperature and have a

number of power-down options for low-power applications.

The part powers up with a set of default conditions and can

operate as a read-only ADC.

The AD7858 is capable of 200 kHz throughput rate while the

AD7858L is capable of 100 kHz throughput rate. The input

track-and-hold acquires a signal in 500 ns and features a

pseudo-differential sampling scheme. The AD7858/AD7858L

voltage range is 0 to V

REF

with straight binary output coding.

Input signal range is to the supply and the part is capable of con-

verting full power signals to 100 kHz.

CMOS construction ensures low power dissipation of typically

4.5 mW for normal operation and 1.15 mW in power-down

mode with a throughput rate of 10 kSPS (V

= 3 V). The part

is available in 24-lead, 0.3 inch-wide dual-in-line package

(DIP), 24-lead small outline (SOIC), and 24-lead small shrink

outline (SSOP) packages.

See page 31 for data sheet index.

SPI and QSPI are trademarks of Motorola, Inc.

PRODUCT HIGHLIGHTS

1. Specified for 3 V and 5 V supplies.

2. Automatic calibration on power-up.

3. Flexible power management options including automatic

power-down after conversion.

4. Operates with reference voltages from 1.2 V to V

5. Analog input range from 0 V to V

6. Eight single-ended or four pseudo-differential input channels.

7. System and self-calibration.

8. Versatile serial I/O port (SPI/QSPI/8051/µP).

9. Lower power version AD7858L.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700 World Wide Web Site: http://www.analog.com

Fax: 781/326-8703 © Analog Devices, Inc., 2000

arameter A Version

B Version

Units Test Conditions/Comments

DYNAMIC PERFORMANCE

Signal to Noise + Distortion Ratio

70 71 dB min Typically SNR is 72 dB

(SNR) V

= 10 kHz Sine Wave, f

SAMPLE

= 200 kHz (100 kHz)

Total Harmonic Distortion (THD) –78 –78 dB max V

= 10 kHz Sine Wave, f

SAMPLE

= 200 kHz (100 kHz)

Peak Harmonic or Spurious Noise –78 –78 dB max V

= 10 kHz Sine Wave, f

SAMPLE

= 200 kHz (100 kHz)

Intermodulation Distortion (IMD)

Second Order Terms –78 –80 dB typ fa = 9.983 kHz, fb = 10.05 kHz, f

SAMPLE

= 200 kHz (100 kHz)

Third Order Terms –78 –80 dB typ fa = 9.983 kHz, fb = 10.05 kHz, f

SAMPLE

= 200 kHz (100 kHz)

Channel-to-Channel Isolation –90 –90 dB typ V

= 25 kHz

DC ACCURACY Any Channel

Resolution 12 12 Bits

Integral Nonlinearity ±1 ±1 LSB max 2.5 V External Reference V

= 3 V, V

= 5 V (B Grade Only)

±1 ±0.5 LSB max 5 V External Reference V

= 5 V

(±1) LSB max (L Version, 5 V External Reference, V

= 5 V)

(±1) LSB max (L Version)

Differential Nonlinearity ±1 ±1 LSB max Guaranteed No Missed Codes to 12 Bits. 2.5 V External

Reference V

= 3 V, 5 V External Reference, V

= 5 V

Total Unadjusted Error ±1 ±1 LSB typ

Unipolar Offset Error ±5 ±5 LSB max Typically ±2 LSBs

±2.5 ±2.5 LSB max 5 V External Reference, V

= 5 V

(± 3) (±3) LSB max (L Version)

(± 1.5) (±1.5) LSB max (L Version, 5 V External Reference, V

= 5 V)

Unipolar Offset Error Match 1.5 1.5 LSB max

Positive Full-Scale Error ± 4 ±4 LSB max

±1.5 ±1.5 LSB max 5 V External Reference, V

= 5 V

Positive Full-Scale Error Match 1 1 LSB max

ANALOG INPUT

Input Voltage Ranges 0 to V

REF

0 to V

REF

Volts i.e., AIN(+) – AIN(–) = 0 to V

REF

, AIN(–) can be biased

up but AIN(+) cannot go below AIN(–)

Leakage Current ±1 ±1 µA max

Input Capacitance 20 20 pF typ

REFERENCE INPUT/OUTPUT

REF

Input Voltage Range 2.3/V

2.3/V

V min/max Functional from 1.2 V

Input Impedance 150 150 kΩ typ

REF

OUT

Output Voltage 2.3/2.7 2.3/2.7 V min/max

REF

OUT

Tempco 20 20 ppm/°C typ

LOGIC INPUTS

Input High Voltage, V

INH

2.4 2.4 V min AV

= DV

= 4.5 V to 5.5 V

2.1 2.1 V min AV

= DV

= 3.0 V to 3.6 V

Input Low Voltage, V

INL

0.8 0.8 V max AV

= DV

= 4.5 V to 5.5 V

0.6 0.6 V max AV

= DV

= 3.0 V to 3.6 V

Input Current, I

±10 ±10 µA max Typically 10 nA, V

= 0 V or V

Input Capacitance, C

10 10 pF max

LOGIC OUTPUTS

Output High Voltage, V

SOURCE

= 200 µA

4 4 V min AV

= DV

= 4.5 V to 5.5 V

2.4 2.4 V min AV

= DV

= 3.0 V to 3.6 V

Output Low Voltage, V

0.4 0.4 V max I

SINK

= 0.8 mA

Floating-State Leakage Current ± 10 ± 10 µA max

Floating-State Output Capacitance

10 10 pF max

Output Coding Straight (Natural) Binary

CONVERSION RATE

Conversion Time 4.6 (18) 4.6 µs max (L Versions Only, –40°C to +85°C, 1 MHz CLKIN)

(10) µs max (L Versions Only, 0°C to +70°C, 1.8 MHz CLKIN)

Track/Hold Acquisition Time 0.4 (1) 0.4 (1) µs min (L Versions Only)

REV. B

–2–

AD7858/AD7858L–SPECIFICATIONS

1, 2

(AV

= DV

= +3.0 V to +5.5 V, REF

/REF

OUT

= 2.5 V External

Reference unless otherwise noted, f

CLKIN

= 4 MHz (1.8 MHz B Grade (0ⴗC to +70ⴗC), 1 MHz A and B Grades (–40ⴗC to +85ⴗC) for L Version); f

SAMPLE

200 kHz (AD7858), 100 kHz (AD7858L); SLEEP = Logic High; T

= T

MIN

to T

MAX

, unless otherwise noted.) Specifications in ( ) apply to the AD7858L.

Parameter A Version

B Version

Units Test Conditions/Comments

DYNAMIC PERFORMANCE

DD,

+3.0/+5.5 +3.0/+5.5 V min/max

Normal Mode

6 (1.9) 6 (1.9) mA max AV

= DV

= 4.5 V to 5.5 V. Typically 4.5 mA (1.5)

5.5 (1.9) 5.5 (1.9) mA max AV

= DV

= 3.0 V to 3.6 V. Typically 4.0 mA (1.5 mA)

Sleep Mode

With External Clock On 10 10 µA typ Full Power-Down. Power Management Bits in Control

400 400 µA typ Partial Power-Down. Power Management Bits in

Control Register Set as PMGT1 = 1, PMGT0 = 1

With External Clock Off 5 5 µA max Typically 1 µA. Full Power-Down. Power Management Bits

in Control

200 200 µA typ Partial Power-Down. Power Management Bits in Control

Normal-Mode Power Dissipation 33 (10.5) 33 (10.5) mW max V

= 5.5 V. Typically 25 mW (8); SLEEP = V

20 (6.85) 20 (6.85) mW max V

= 3.6 V. Typically 15 mW (5.4); SLEEP = V

Sleep Mode Power Dissipation

With External Clock On 55 55 µW typ V

= 5.5 V. SLEEP = 0 V

36 36 µW typ V

= 3.6 V. SLEEP = 0 V

With External Clock Off 27.5 27.5 µW max V

= 5.5 V. Typically 5.5 µW; SLEEP = 0 V

18 18 µW max V

= 3.6 V. Typically 3.6 µW; SLEEP = 0 V

SYSTEM CALIBRATION

Offset Calibration Span

+0.05 × V

REF

/–0.05 × V

REF

V max/min Allowable Offset Voltage Span for Calibration

Gain Calibration Span

+1.025 × V

REF

/–0.975 × V

REF

V max/min Allowable Full-Scale Voltage Span for Calibration

NOTES

Temperature ranges as follows: A, B Versions: –40°C to +85°C. For L Versions, A and B Versions f

CLKIN

= 1 MHz over –40°C to +85°C temperature range,

B Version f

CLKIN

= 1.8 MHz over 0°C to +70°C temperature range.

Specifications apply after calibration.

SNR calculation includes distortion and noise components.

Sample tested @ +25°C to ensure compliance.

All digital inputs @ DGND except for CONVST, SLEEP, CAL, and SYNC @ DV

. No load on the digital outputs. Analog inputs @ AGND.

CLKIN @ DGND when external clock off. All digital inputs @ DGND except for CONVST, SLEEP , CAL, and SYNC @ DV

. No load on the digital

outputs. Analog inputs @ AGND.

The Offset and Gain Calibration Spans are defined as the range of offset and gain errors that the AD7858/AD7858L can calibrate. Note also that these are voltage

spans and are not absolute voltages ( i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–)

±0.05 × V

REF

, and the allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be

REF

± 0.025 × V

REF

). This is explained in more detail in the Calibration section of the data sheet.

Specifications subject to change without notice.

AD7858/AD7858L

REV. B

–3–

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P32

AD7858ARZ

Mfr. #:

Buy AD7858ARZ

Manufacturer:

Analog Devices Inc.

Description:

Analog to Digital Converters - ADC 3-5V SGL Supply 200kSPS 8-Ch 12-Bit

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AD7858ARZ

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