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TDA8034HN/C2QL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 3.4 — 29 June 2016 19 of 32
NXP Semiconductors
TDA8034HN
Low power smart card interface
t
r
rise time C
L
= 100 pF - - 0.1 s
t
f
fall time C
L
= 100 pF - - 0.1 s
Clock output to the card: pin CLK
V
o
output voltage Shutdown mode
no load 0 - 0.1 V
I
o
=1mA 0 - 0.3 V
I
o
output current Shutdown mode; pin CLK
grounded
-- 1mA
V
OL
LOW-level output
voltage
I
OL
= 200 A - C1 version 0 - 0.3 V
I
OL
= 200 A - C2 version 0 - 0.15 V
CC
V
current limit I
OL
=70mA V
CC
0.4 - V
CC
V
V
OH
HIGH-level output
voltage
I
OH
= 200 A0.9V
CC
-V
CC
V
current limit I
OH
= 70 mA 0 - 0.4 V
t
r
rise time C
L
=30pF
[5]
- - 16 ns
t
f
fall time C
L
=30pF
[5]
- - 16 ns
f
CLK
frequency on pin CLK operational 0 - 20 MHz
duty cycle C
L
=30pF
[5]
45 - 55 %
SR slew rate rise and fall; C
L
=30pF
V
CC
=5V 0.2 - - V/ns
V
CC
= 3 V or 1.8 V 0.12 - - V/ns
Control inputs: pins CLKDIV1, CLKDIV2, RSTIN, VCC_SEL1 and VCC_SEL2
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7 V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
Control input: pin CMDVCCN
[6]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+0.3 V
V
hys
hysteresis voltage control input - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current V
IL
=0V - - 1 A
I
IH
HIGH-level input
current
V
IH
=V
DD(INTF)
-- 1 A
f
CMDVCCN
frequency on pin
CMDVCCN
-- 100Hz
Table 7. Characteristics of IC supply voltage
…continued
V
DDP
= 5 V; V
DD
= 3.3 V; V
DD(INTF)
= 3.3 V; f
xtal
= 10 MHz; GND = 0 V; T
amb
= 25
C; for C1 and C2 versions; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 3.4 — 29 June 2016 20 of 32
NXP Semiconductors
TDA8034HN
Low power smart card interface
[1] To meet these specifications, V
CC
should be decoupled to pin GND using two ceramic multilayer capacitors of low ESR with values of
one 220 nF and one 470 nF.
[2] Using decoupling capacitors of one 220 nF 20 % and one 470 nF 20 %.
[3] Using the integrated 9 k pull-up resistor connected to V
CC
.
[4] Using the integrated 10 k pull-up resistor connected to V
DD(INTF)
.
[5] The transition time and the duty factor definitions are shown in Figure 11 on page 21
; = t1 / (t1 + t2).
[6] Pins PRESN and CMDVCCN are active LOW; pin RSTIN is active HIGH; see Table 4
for states of pins CLKDIV1 and CLKDIV2.
[7] Pin PRESN has an integrated current source of 1.25 A to V
DD(INTF)
.
[8] Pin OFFN is an NMOS drain, using an internal 20 k pull-up resistor connected to V
DD(INTF)
.
t
w
pulse width 5 V card 30 - - ms
3V card - - 15 ms
Card detection input: pin PRESN
[6][7]
V
IL
LOW-level input
voltage
0.3 - 0.3V
DD(INTF)
V
V
IH
HIGH-level input
voltage
0.7V
DD(INTF)
-V
DD(INTF)
+ 0.3 V
V
hys
hysteresis voltage pin PRESN - 0.14V
DD(INTF)
-V
I
IL
LOW-level input current 0 V < V
IL
<V
DD(INTF)
-- 5 A
I
IH
HIGH-level input
current
0V<V
IH
<V
DD(INTF)
-- 5 A
OFFN output
[8]
V
OL
LOW-level output
voltage
I
OL
=2mA 0 - 0.3 V
V
OH
HIGH-level output
voltage
I
OH
= 15 A0.75V
DD(INTF)
-- V
R
pu
pull-up resistance connected to V
DD(INTF)
16 20 24 k
Table 7. Characteristics of IC supply voltage
…continued
V
DDP
= 5 V; V
DD
= 3.3 V; V
DD(INTF)
= 3.3 V; f
xtal
= 10 MHz; GND = 0 V; T
amb
= 25
C; for C1 and C2 versions; unless otherwise
specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 8. Protection characteristics
Symbol Parameter Conditions Min Typ Max Unit
I
Olim
output current limit pin I/O 15 - +15 mA
pin V
CC
135 175 225 mA
pin CLK 70 - +70 mA
pin RST 20 - +20 mA
I
sd
shutdown current pin V
CC
90 120 150 mA
T
sd
shutdown temperature at die - 150 - C
Table 9. Timing characteristics
Symbol Parameter Conditions Min Typ Max Unit
t
act
activation time see Figure 7 on page 11 2090 - 4160 s
t
deact
deactivation time see Figure 8 on page 12 35 90 250 s
TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 3.4 — 29 June 2016 21 of 32
NXP Semiconductors
TDA8034HN
Low power smart card interface
t
d
delay time CLK sent to card using an external clock
t
d(start)
= t3; see Figure 7 on page 11 2090 - 4112 s
t
d(end)
= t5; see Figure 7 on page 11 2120 - 4160 s
t
deb
debounce time pin PRESN 3.2 4.5 6.4 ms
Table 9. Timing characteristics
…continued
Symbol Parameter Conditions Min Typ Max Unit
Fig 11. Definition of output and input transition times
001aai973
10 % 10 %
90 % 90 %
t
r
t
f
V
OH
(V
OH
+ V
OL
) / 2
V
OL
t1 t2
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

TDA8034HN/C2QL

Mfr. #:
Buy TDA8034HN/C2QL
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized TDA8034HN/HVQFN24//C2/TRAY SINGLE NDP BAKEABLE
Lifecycle:
New from this manufacturer.
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