3. Block Diagram
4 EPSON S1R72U16 Data Sheet (Rev. 2.00)
3. Block Diagram
FIFO
IDE Device
Controller
XRESET
Transceiver
Macro
USB Host SIE
DP
DM
R1
VBUSEN
OSC
test circuit*
TSTEN, ATPGEN,
BURNIN
VBUSFLG
Bridge
Sequencer
CPUIF
Main CPU I/F Selector
ATAxATAPI
SIO
debug i/f*
DBGDCLK, DBGDT,
DBGST
SCLK0
SIN0
SOUT0
2x1
CPUxIIDE
XO
XI
CLKSEL
GPO
GPI
XChgInt
HDA_T[2:0] / CA[2:0]
XHIOR_T / XRD
XHIOW_T / XWR
XHRESET_T / XHRESET
CSEL_T / CSEL
XHDMACK_T / XDACK
HDMARQ_T / XDREQ
HIORDY_T / -
HDD_T[15:0] / CD[15:0]
XHCS_T[1:0] / XCS, CA[3]
HINTRQ_T / XINT
XHDASP_T /-
XHPDIAG_T / -
XCD0
XCD1
PLL_Locked
ComplianceError[3:0]
Figure 3.1 Block diagram
* Fix the debug I/F and test circuit pins strictly as described in “6. Pin Functions”. They are not intended for
use by users.
4. Functions
S1R72U16 Data Sheet (Rev. 2.00) EPSON 5
4. Functions
4.1 Main CPU I/F
This LSI can be used as either of the following connections to the main CPU.
IDE bus connection (interface voltage: 3.3 V)
CPU bus connection (interface voltage: 1.8 V to 3.3 V)
Bus connection is selected by using the mode setting pin CPUxIDE (PORT02).
4.1.1 IDE Device Controller
This
block operates when IDE bus connection is selected. It supports ATA/ATAPI-6.
PIO transfer modes 0 to 4
Multi Word DMA transfer modes 0 to 2
Ultra DMA transfer modes 0 to 5
4.1.2 CPUIF
This
block operates when CPU bus connection is selected. The registers used to control
this LSI are ATA task file registers. It supports PIO and DMA (*) transfer.
* For DMA transfer, the main CPU must provide a DMA master function that complies
with the DMA specifications of this LSI.
4.2 USB Host
The USB host function complies with the USB 2.0 (Universal Serial Bus Specification Revision 2.0)
standards. It supports HS (480 Mbps) and FS (12 Mbps) speed modes. USB host function is
controlled by the Bridge Sequencer block inside the LSI. USB devices that can be connected to this
LSI are bulk-only transport mass storage class devices (e.g., USB memory) and HUB devices.
4.3 GPI
These are the mode setting pins for selecting the command system, number of connected devices, and
interface to the main CPU.
For detailed information, see the S1R72U16 Technical Manual.
4.4 GPO
These pins are used to issue notification of USB storage device connections, internal PLL operation
status, and NSF (No Silent Failure).
For detailed information, see the S1R72U16 Technical Manual.
4. Functions
6 EPSON S1R72U16 Data Sheet (Rev. 2.00)
4.5 SIO
This block is used to display the product (system) development support function history.
For detailed information, see the S1R72U16 Development Support Manual.
4.6 OSC
This oscillator circuit supports a 12 MHz/24 MHz crystal oscillator. The 12 MHz or 24 MHz clock is
selected using the CLKSEL pin.

S1R72U16B08E200

Mfr. #:
Manufacturer:
Epson ICs
Description:
USB Interface IC USB HS Host cntrlr embedded USB driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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