6. Pin Functions
S1R72U16 Data Sheet (Rev. 2.00) EPSON 9
IDE device I/F (IOVDD system)
BGA QFP Name I/O RESET Details
D8 54 HDA2_T IN -
D6 52 HDA1_T IN -
D5 51 HDA0_T IN -
IDE register address
E6 50 XHCS1_T IN - Control register access chip selection
E7 49 XHCS0_T IN - Command block register access chip selection
J6 33 XHIOR_T IN - IDE read strobe
G5 31 XHIOW_T IN - IDE write strobe
H5 30 HDMARQ_T OUT Low DMA transfer request
J5 29 XHDMACK_T IN - DMA transfer acknowledge
H6 32 HIORDY_T
OUT
(PU)
Hi-z IDE register ready signal (*)
F5 28 HINTRQ_T OUT Low IDE interrupt request
E9 48 XHRESET_T IN - IDE bus reset
E8 47 XHDASP_T BI(PU) Hi-z Drive enable/slave drive present (*)
F7 46 XHPDIAG_T BI(PU) Hi-z Diagnosis sequence end signal (*)
F9 45 CSEL_T IN - Drive selection
D7 55 HDD15_T BI Hi-Z
C9 56 HDD14_T BI Hi-Z
C8 57 HDD13_T BI Hi-Z
C7 58 HDD12_T BI Hi-Z
B8 59 HDD11_T BI Hi-Z
A8 61 HDD10_T BI Hi-Z
B7 62 HDD9_T BI Hi-Z
A7 63 HDD8_T BI Hi-Z
C6 64 HDD7_T BI Hi-Z
B6 65 HDD6_T BI Hi-Z
C5 67 HDD5_T BI Hi-Z
B5 68 HDD4_T BI Hi-Z
A5 69 HDD3_T BI Hi-Z
D4 70 HDD2_T BI Hi-Z
C4 71 HDD1_T BI Hi-Z
B4 72 HDD0_T BI Hi-Z
IDE data bus
PU: Using pull-up I/O
* LSI internal pull-up is disabled in IDE mode.
Serial I/F (HVDD system)
BGA QFP Name I/O RESET Details
J4 23 SCLK0 I(PU) Not used (*)
H4 20 SIN0 I(PU) - Asynchronous serial data in
J3 22 SOUT0 O High Asynchronous serial data out
PU: Using pull-up I/O
* Set to open or pull-up.
