8308I Data Sheet
©2015 Integrated Device Technology, Inc December 10, 201513
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for 8308I is: 1040
TABLE 6. θ
JA
VS. AIR FLOW TABLE FOR 24 LEAD TSSOP
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 63°C/W 60°C/W
PACKAGE OUTLINE AND DIMENSIONS
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
REFERENCE DOCUMENT: JEDEC PUBLICATION 95, MO-153
SYMBOL
Millimeters
Minimum Maximum
N24
A -- 1.20
A1 0.05 0.15
A2 0.80 1.05
b 0.19 0.30
c 0.09 0.20
D 7.70 7.90
E 6.40 BASIC
E1 4.30 4.50
e 0.65 BASIC
L 0.45 0.75
α
aaa -- 0.10
8308I Data Sheet
©2015 Integrated Device Technology, Inc December 10, 201514
TABLE 8. ORDERING INFORMATION
Part/Order Number Marking Package Shipping Packaging Temperature
8308AGILF ICS8308AGILF 24 Lead “Lead-Free” TSSOP tube -40°C to 85°C
8308AGILFT ICS8308AGILF 24 Lead “Lead-Free” TSSOP tape & reel -40°C to 85°C
8308I Data Sheet
©2015 Integrated Device Technology, Inc December 10, 201515
REVISION HISTORY SHEET
Rev Table Page Description of Change Date
A
11 Added Schematic Layout
4/16/04
B
T4B
T4E
T5B
1
3
4
6
8
Features section - added mix supply voltage bullet.
Added Mix Power Supply Table.
Added Mix DC Characteristics Table.
Added Mix AC Characteristics Table.
Added Mix Output Load AC Test Circuit Diagram.
10/20/04
B
T8 14 Ordering Information Table - added “Lead-Free” part number.
1/12/05
B
T8
1
10
14
Corrected Block Diagram, added CLK_SEL.
Added “Recommendations for Unused Input and Output Pins”.
Ordering Information Table - added Lead-Free note.
7/25/05
B
1 Pin Assignment - corrected package information from 300-MIL to 173-MIL.
8/4/06
B
T3B 2 Added OE Select Function Table.
10/16/07
C
T4F
T5A - T5C
T8
5
5 -7
14
DC Characteristics - corrected V
IH
min. from 2V to 1.7V; V
IL
max. from 1.3V to 0.7V.
AC Characteristics - added thermal note.
Ordering Information Table - deleted ICS prefi x from Part/Order Number column.
7/16/09
C
10
12
Updated Wiring the Differential Input to Accept Single-ended Levels application note.
Added Power On Sequence application note.
3/23/11
C
T8
12
14
Recommended for Unusted I/O Pins - changed CLK Input: to LVCMOS_CLK.
deleted lead-free note.
4/4/13
C1
Removed ICS from the part numbers thoughout the datasheet.
Removed reference to leaded devices in features section.
Updated header and footer.
12/10/15

8308AGILFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 1:8 Differential/LVC MOS to LVCMOS Fanout
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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