TDA8034T_TDA8034AT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3.1 — 13 December 2012 4 of 30
NXP Semiconductors
TDA8034T; TDA8034AT
Smart card interface
7. Pinning information
7.1 Pinning
7.2 Pin description
[1] I = input, O = output, I/O = input/output, G = ground and P = power supply.
[2] If pin PRESN is LOW, the card is considered to be present. During card insertion, debouncing can occur on these signals. To counter
this, the TDA8034T/TDA8034AT has a built-in debouncing timer (typically 4.5 ms).
[3] Uses an internal 11 k pull-up resistor connected to pin V
CC
.
[4] Using a 220 nF capacitor increases the noise margin on pin V
CC
.
Fig 2. Pin configuration (SO16)
TDA8034T
TDA8034AT
TDA8034BT
XTAL1 I/OUC
XTAL2 OFFN
V
DD(INTF)
V
DD
RSTIN V
DDP
CMDVCCN V
CC
CLKDIV1 RST
PRESN CLK
I/O GND
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1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 3. Pin description
Symbol Pin Supply Type
[1]
Description
XTAL1 1 V
DD
I crystal connection input
XTAL2 2 V
DD
O crystal connection output
V
DD(INTF)
3V
DD(INTF)
P interface supply voltage
RSTIN 4 V
DD(INTF)
I microcontroller card reset input; active HIGH
CMDVCCN 5 V
DD(INTF)
I microcontroller start activation sequence input; active LOW
CLKDIV1 6 V
DD(INTF)
I sets the clock frequency on pin CLK; see Table 4 on page 7
PRESN 7 V
DD(INTF)
I card presence contact input; active LOW
[2]
I/O 8 V
CC
I/O card input/output data line (C7)
[3]
GND 9 - G ground
CLK 10 V
CC
O card clock (C3)
RST 11 V
CC
O card reset (C2)
V
CC
12 V
CC
P card supply (C1); decouple to pin GND using one 470 nF capacitor close to pin V
CC
and one 220 nF capacitor close to card socket contact C1 with an ESR < 100 m
[4]
V
DDP
13 V
DDP
P low-dropout regulator input supply voltage
V
DD
14 V
DD
P digital supply voltage
OFFN 15 V
DD(INTF)
O NMOS interrupt to microcontroller
[5]
; active LOW; see Section 8.9 on page 11
I/OUC 16 V
DD(INTF)
I/O microcontroller input/output data line
[6]
