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ADUCM320BBCZ

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ADuCM320 Data Sheet
Rev. C | Page 12 of 30
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Full-Scale Error IDAC set to 85% of full scale
IDAC0, IDAC1 ±0.75 % 25°C to 105°C range
±3.5 %
IDAC2, IDAC3 ±0.75 %
Full-Scale Error Drift
IDAC0, IDAC1 Internal V
REF
−40°C to 105°C 25 µA/°C
25°C to 105°C 5 µA/°C
IDAC2, IDAC3 2 µA/°C Internal V
REF
Integral Nonlinearity INL ±3 ±6 LSB 1 LSB = 150 mA/2
11
Differential Nonlinearity DNL −0.99 +1.5 LSB
Guaranteed 11-bit monotonic,
1 LSB = 150 mA/2
11
Zero-Scale Error ±50 µA
Zero-Scale Error Drift
IDAC0, IDAC1 ±300 nA/°C
IDAC2, IDAC3 ±800 nA/°C
Noise Current 2 µA IDACxCON[5:2] = 0
Pull-Down Current
−220
−165
−100
µA
When enabled
Settling Time
IDACxCON[5:2] = 0
To 0.1%
100
µs
±4 mA change from midscale
To 1% 50 µs ±4 mA change from midscale
Full Scale to 0 mA 20 µs Pull-down enabled
Overheat Shutdown 135 °C Junction temperature
PVDD ACPSRR IDACxCON[5:2] = 0
100 Hz 51 dB
1 kHz 45 dB
10 kHz 25 dB
100 kHz 10 dB
COMPARATOR
Input
Offset Voltage ±10 mV
Bias Current 1 nA
Voltage Range
1
AGNDx AVDDx – 1.2 V
Capacitance 7 pF
Hysteresis
1
8.5 15 mV When enabled in software
Response Time 7 µs AFECOMP[2:1] = 0
TEMPERATURE SENSOR
Indicates die temperature, see
Figure 9
Resolution 0.5 °C
When precision calibrated by the
user
6
Accuracy
1
1.34
1.43
V
ADC measured voltage for
temperature sensor channel without
calibration, T = 25°C
POWER-ON RESET POR 2.85 2.9 V
External Reset Minimum Pulse Width
1
1.5 µs
Minimum pulse width required on
external reset pin to trigger a reset
sequence
WATCHDOG TIMER WDT
Timeout Period 32 sec Default at power-up
FLASH/EE MEMORY
Endurance
1
10,000
Cycles
Data Retention
1
20 Years T
J
= 85°C
Data Sheet ADuCM320
Rev. C | Page 13 of 30
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DIGITAL INPUTS
Input Leakage Current
Logic 1 GPIO 1 nA V
IH
= V
DD
, pull-up resistor disabled
Logic 0 GPIO 10 nA V
IL
= 0 V, pull-up resistor disabled
PRTADDRx
Input Leakage Current 16 µA
V
IN
= 0 to 1.8 V, due to weak pull-
up resistors to 1.8 V
Input Voltage 0.84 1.5 V
External resistor 91 kΩ ± 1% to
ground, range for CFP MSA high
1
Input Capacitance, All Pins Except MCK,
MDIO, PRTADDRx, and XTALx
10
pF
Input Capacitance
MCK, PRTADDRx 6.5 pF
MDIO 8.5 pF
Pin Capacitance
XTALI 5 pF
XTALO 5 pF
LOGIC INPUTS
GPIO Input Voltage
Low V
INL
0.25 × IOVDDx V
High V
INH
0.58 × IOVDDx V
MDIO
PRTADDRx Input Voltage
Low V
INL
0.36 V
High V
INH
0.84 V
MCK, MDIO Input Voltage
Setup time ≥10 ns; hold time
≥10 ns; MCK/MDIO
Low V
INL
0.36 V
V
INH
0.84
V
Low V
INL
1.1 V
High V
INH
1.7 V
Pull-Up Current 30 120 µA V
IN
= 0 V, see Figure 10
Pull-Down Current 30 100 µA V
IN
= 3.3 V, see Figure 10
LOGIC OUTPUTS
All digital outputs excluding
XTALO
GPIO Output Voltage
7
High V
OH
IOVDDx − 0.4 V I
SOURCE
= 2 mA
V
OL
0.4
V
I
SINK
= 2 mA
1
11
mA
See Figure 13
Output Voltage
High V
OH
1.0 V I
SOURCE
= 4 mA
Low V
OL
0.2 V I
SINK
= 4 mA
Delay Time 100 ns MCK to MDIO out
OSCILLATORS
Internal System Oscillator 16 MHz
±0.5
±3
%
System PLL 80 MHz Main system clock
16
MHz
Can be selected in place of
internal oscillator
32 kHz Internal Oscillator 32.768 kHz Use for watchdog
Accuracy ±5 ±20 %
External Clock 0.05 80 MHz Can be selected in place of PLL
START-UP TIME Processor clock = 80 MHz
At Power-On 40 ms POR to first user code execution
After Other Reset 1.5 ms Reset to first user code execution
From All Power-Down Modes 1.25 µs
ADuCM320 Data Sheet
Rev. C | Page 14 of 30
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
PROGRAMMABLE LOGIC ARRAY PLA
Propagation Delay
Pin 17 ns From input pin to output pin
Element 1.5 ns Per PLA cell
EXTERNAL INTERRUPTS
Pulse Width
1
Level Triggered 7 ns
Edge Triggered 1 ns
POWER REQUIREMENTS
8
Power Supply Voltage Range
AVDDx to AGNDx and IOVDDx
to DGNDx
1
2.9 3.3 3.6 V
Analog Power Supply Currents
AVDDx Current 6.3 mA Analog peripherals in idle mode
Digital Power Supply Current
IOVDDx Current in Normal Mode 4 mA All GPIO pull-up resistors enabled
VDDx Current
Normal Mode
9
29 mA CD = 0 (80 MHz clock) executing
typical code
20 mA CD = 1 executing typical code
10 mA CD = 7 executing typical code
CORE_SLEEP Mode
9
16 mA
SYS_SLEEP Mode
9
8 mA
Hibernate Mode
9
6.6 mA
Additional Power Supply Currents
ADC 4.1 mA Continuously converting at
100 kSPS
ADC Input Buffer 4.0 mA Both buffers enabled
IDAC 16.5 mA Excluding load current
DAC 340 μA Per powered up DAC, excluding
load current
Total Supply Current 35 40 45 mA VDD1, IOVDDx, AVDDx connected
together; condition when entering
user code: peripheral clocks on,
peripherals idle, no load currents
Thermal Performance
Impedance Junction to Ambient 45 °C/W JEDEC 2S2P
1
These numbers are not production tested but are guaranteed by design and/or characterization data at production release.
2
Enabling the input buffer changes the ADC input characteristics as described in this subsection.
3
The data in this section also applies for a load of R
L
= 1 kΩ and C
L
= 100 pF to GND but only for 0 V to 2.5 V. However, this is not production tested.
4
DAC linearity is calculated using a reduced code range of 100 to 3900.
5
DAC gain error is calculated using a reduced code range of 100 to an internal 2.5 V V
REF
.
6
Due to self heating, internal temperature measurements cannot be used to predict external temperatures. This value is only relevant after user calibration and only for
internal and external conditions identical to those at calibration.
7
The average current from all GPIO pins must not exceed 3 mA per pin.
8
Power figures exclude any load currents to external circuits.
9
See the ADuCM320 reference manual, How to Set up and Use the ADuCM320
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ADUCM320BBCZ

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Buy ADUCM320BBCZ
Manufacturer:
Analog Devices Inc.
Description:
ARM Microcontrollers - MCU 80Mhz Cortex M3 wi 14Bit Analog for CFP
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New from this manufacturer.
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