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ADUCM320BBCZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
ADuCM320 Data Sheet
Rev. C | Page 18 of 30
Table 7. SPI Slave Mode Timing (Phase Mode = 1)
Parameter Description Min Typ Max Unit
t
CS
CS
to SCLK edge 10 ns
t
CS
M
CS
high time between active periods
SCLKx
ns
t
SL
SCLK low pulse width (SPIDIV + 1) × t
HCLK
ns
t
SH
SCLK high pulse width (SPIDIV + 1) × t
HCLK
ns
t
DAV
Data output valid after SCLK edge 20 ns
t
DSU
Data input setup time before SCLK edge 10 ns
t
DHD
Data input hold time after SCLK edge 10 ns
t
DF
Data output fall time 25 ns
t
DR
Data output rise time
25
ns
t
SR
SCLK rise time 1 ns
t
SF
SCLK fall time 1 ns
t
SFS
CS
high after SCLK edge 20 ns
Figure 5. SPI Slave Mode Timing (Phase Mode = 1)
12272-005
SCLK
(POLARITY = 0)
SCLK
(POLARITY = 1)
t
SH
t
SL
t
SR
t
SF
t
SFS
MISO MSB BITS 6 TO 1 LSB
MOSI MSB IN BITS 6 TO 1 LSB IN
t
DHD
t
DSU
t
DAV
t
DR
t
DF
CS
t
CS
t
CSM
Data Sheet ADuCM320
Rev. C | Page 19 of 30
Table 8. SPI Slave Mode Timing (Phase Mode = 0)
Parameter Description Min Typ Max Unit
t
CS
CS
to SCLK edge 10 ns
t
CS
M
CS
high time between active periods
SCLKx
ns
t
SL
SCLK low pulse width (SPIDIV + 1) × t
HCLK
ns
t
SH
SCLK high pulse width (SPIDIV + 1) × t
HCLK
ns
t
DAV
Data output valid after SCLK edge 20 ns
t
DSU
Data input setup time before SCLK edge 10 ns
t
DHD
Data input hold time after SCLK edge 10 ns
t
DF
Data output fall time 25 ns
t
DR
Data output rise time
25
ns
t
SR
SCLK rise time 1 ns
t
SF
SCLK fall time 1 ns
t
DOCS
Data output valid after
CS
edge 20 ns
t
SFS
CS
high after SCLK edge 10 ns
Figure 6. SPI Slave Mode Timing (Phase Mode = 0)
12272-006
SCLK
(POLARITY = 0)
CS
SCLK
(POLARITY = 1)
t
SH
t
SL
t
SR
t
SF
t
SFS
MISO
MOSI
MSB IN BITS 6 TO 1 LSB IN
t
DHD
t
DSU
MSB BITS 6 TO 1 LSB
t
DOCS
t
DAV
t
DR
t
DF
t
CS
t
CSM
ADuCM320 Data Sheet
Rev. C | Page 20 of 30
Table 9. MDIO vs MDC Timing
Parameter Description Min Typ Max Unit
t
SETUP
MDIO setup before MCK edge 10 ns
t
HOLD
MDIO valid after MCK edge 10 ns
t
DELAY
Data output after MCK edge 100 ns
Figure 7. MDIO Timing
12272-007
MCK
VIH
VIL
VIH
VIL
VOH
VOL
CFP
INPUT
MDIO
CFP
INPUT
MDIO
CFP
OUTPUT
t
SETUP
t
HOLD
t
DELAY
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31

ADUCM320BBCZ

Mfr. #:
Buy ADUCM320BBCZ
Manufacturer:
Analog Devices Inc.
Description:
ARM Microcontrollers - MCU 80Mhz Cortex M3 wi 14Bit Analog for CFP
Lifecycle:
New from this manufacturer.
Delivery:
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