BelaSigna 300
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19
Analog Blocks
Input Stage
The analog audio input stage is comprised of four
individual channels. For each channel, one input can be
selected from any of the five possible input sources
(depending on package option) and is then routed to the
input of the programmable preamplifier that can be
configured for bypass or gain values of 12 to 30 dB (3 dB
steps). The input stage is shown in Figure 8.
A built−in feature allows a sampling delay to be
configured for any one or more channels. This is useful in
beam−forming applications.
Figure 8. Input Stage
Channel 0
Conversion
and filtering
AI0
AI1
AI2
AI4
Channel 1
Channel 2
Channel 3
M
U
X
M
U
X
Preamp
Preamp
Preamp
Preamp
Conversion
and filtering
Conversion
and filtering
Conversion
and filtering
IOC
AI3*
* Not available on WLCSP option
Preamp
Preamp
Preamp
Preamp
Input Dynamic Range Extension (IDRX)
To increase the input dynamic range for a particular
application, it is possible to pair−wise combine the four AD
converters found on BelaSigna 300. This will increase the
dynamic range up to 110 dB. When this technique is used,
the device handles the preamplifier gain configuration based
on the input level and sets it in such a way as to give the
maximum possible dynamic range. This avoids having to
make the design trade−off between sufficient amplification
for low−level signals and avoiding saturation for high−level
signals.
Output Stage
The output stage includes a 3
rd
−order sigma−delta
modulator to produce a pulse density modulated (PDM)
output signal. The sampling frequency of the sigma delta
modulator is pre−scaled from the system clock.
The low−impedance output driver can also be used to
directly drive an output transducer without the need for a
separate power amplifier or can be connected to another
Digital Mic input on another system. The output stage is
shown in Figure 9.
BelaSigna 300 has an option for high−power mode that
decreases the impedance of the output stage, thus permitting
higher possible acoustic output levels. To use this feature,
RCVR_HP+ should be connected to RCVR+, and
RCVR_HP− should be connected to RCVR−, you must
combine the synchronized output signals externally to
BelaSigna 300. Connect both RCVR+ and RCVR_HP+ to
a single terminal on an output transducer, and connect both
RCVR− and RCVR_HP− to the other terminal. An RC filter
might be required based on receiver characteristics. Figure 9
shows the connections for the output driver in high−power
mode.
Electrical specifications on the output stage are available
in Table 2.
BelaSigna 300
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20
Figure 9. Output Stage
Upsampling and
conversion
Output
driver
Output
from IOC
RCVR+
RCVR_HP+
RCVR−
RCVR_HP−
Figure 10. External Signal Routing of Connections for High−Power Output Mode
The high−frequencies in the Class−D PDM output are
filtered by an RC filter or by the frequency response of the
speaker itself. ON Semiconductor recommends a 2−pole RC
filter on the output stage if the output signal is not directly
driving a receiver. Given below is the simple schematic for
a 2−pole RC filter.
Figure 11. 2−Pole RC filter
Our recommendations for components for the RC Filter
are given below:
For 8 KHz sampling, we recommend R = 8.2 k and C = 1 nF
(3 dB cutoff frequency at 3.3 kHz)
For 16 KHz sampling, we recommend R = 8.2 k and C =
330 pF (3 dB cutoff frequency at 9 kHz)
Clock Generation Circuitry
BelaSigna 300 is equipped with an un−calibrated internal
RC oscillator that will provide clock support for booting and
stand−by mode operations. This internal clocking circuitry
cannot be used during normal operation; as such, an external
clock signal must be present on the EXT_CLK pin to allow
BelaSigna 300 to operate. All other needed clocks in the
system are derived from this external clock frequency.
Figure 12 shows the internal clock structure of BelaSigna
300.
BelaSigna 300
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21
Figure 12. Internal Clocking Structure
Power Supply Unit
BelaSigna 300 has multiple power sources as can be seen on Figure 13. Digital and analog sections of the chip have their
own power supplies to allow exceptional audio quality.
Figure 13. Power Supply Structure
Battery Supply Voltage (VBAT)
The primary voltage supplied to a BelaSigna 300 device
is VBAT. It is typically 1.8 V. BelaSigna 300 also uses VBAT
to define the I/O voltage levels, as well as powering an
external EEPROM on the SPI port. Consequently, any
voltage below 1.8 V will result in incorrect operation of the
EEPROM.
Internal Band Gap Reference Voltage
The band gap reference voltage has been stabilized over
temperature and process variations. This reference voltage
is used in the generation of all of the regulated voltages in the
BelaSigna 300 system and provides a nominal 1 V reference
signal to all components using the reference voltage.

B300D44A102XXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Audio DSPs BELASIGNA 300
Lifecycle:
New from this manufacturer.
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