L6566A Application information
Doc ID 13794 Rev 4 29/52
If the FF option is selected, the line feedforward function can be still used to compensate for
the total propagation delay Td of the current sense chain (internal propagation delay td
(H-L)
plus the turn-off delay of the external MOSFET), which in standard current mode PWM
controllers is done by adding an offset on the current sense pin proportional to the input
voltage. In that case, the divider ratio k, which is much smaller when compared to that used
with the QR option selected, can be calculated with the following equation:
Equation 8
where Lp is the inductance of the primary winding. In case a constant maximum power
capability vs. the input voltage is not required, the VFF pin can be grounded, directly or
through a resistor (see
Section 5.11), therefore fixing the overcurrent setpoint at 1 V, or
biased at a fixed voltage through a divider from VREF to get a lower setpoint.
It is possible to bypass the pin to ground with a small film capacitor (e.g. 1-10 nF) to ensure
a clean operation of the IC even in a noisy environment.
The pin is internally forced to ground during UVLO, after activating any latched protection
and when the COMP pin is pulled below its low clamp voltage (see
Section 5.5).
5.7 Hiccup-mode OCP
A third comparator senses the voltage on the current sense input and shuts down the device
if the voltage on the pin exceeds 1.5 V, a level well above that of the maximum overcurrent
setpoint (1 V). Such an anomalous condition is typically generated by either a short-circuit of
the secondary rectifier or a shorted secondary winding, or a hard-saturated flyback
transformer.
To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the
first time the comparator is tripped, the protection circuit enters a “warning state”. If, in the
next switching cycle, the comparator is not tripped, a temporary disturbance is assumed and
the protection logic is reset in its idle state; if the comparator is tripped again a real
malfunction is assumed and the L6566A is stopped. Depending on the time relationship
between the detected event and the oscillator, occasionally the device may stop after the
third detection.
This condition is latched as long as the device is supplied. While it is disabled, however, no
energy is coming from the self-supply circuit; so the voltage on the Vcc capacitor decays
and crosses the UVLO threshold after some time, which clears the latch. If the internal
startup generator is still off, then the Vcc voltage still needs to go below its restart voltage
before the Vcc capacitor is charged again and the device restarted. Ultimately, this results in
a low-frequency intermittent operation (hiccup-mode operation), with very low stress on the
power circuit. This special condition is illustrated in the timing diagram of
Figure 18.
