L6566A Application information
Doc ID 13794 Rev 4 35/52
The ZCD pin is connected to the auxiliary winding through a resistor divider R
Z1
, R
Z2
(see
Figure 8). The divider ratio k
OVP
= R
Z2
/ (R
Z1
+ R
Z2
) is chosen equal to:
Equation 10
where Vout
OVP
is the output voltage value that is to activate the protection, Ns is the turn
number of the secondary winding and Naux is the turn number of the auxiliary winding. The
value of R
Z1
is such that the current sourced by the ZCD pin be within the rated capability of
the internal clamp:
Equation 11
where Vin
max
is the maximum DC input voltage and Ns the turn number of the primary
winding. See
Section 5.2 for additional details.
To reduce sensitivity to noise and prevent the latch from being erroneously activated, first
the OVP comparator is active only for a small time window (typically, 0.5 µs), starting 2 µs
after MOSFET turn-off, to reject the voltage spike associated to the positive-going edges of
the voltage across the auxiliary winding Vaux; secondly, to stop the L6566A, the OVP
comparator must be triggered for four consecutive switching cycles. A counter, which is
reset every time the OVP comparator is not triggered in one switching cycle, is provided for
this purpose.
Figure 22 shows the internal block diagram, while the timing diagrams in Figure 23 illustrate
the operation.
Note: To use the OVP function effectively, i.e. to ensure that the OVP comparator is always
interrogated during MOSFET OFF-time, the duty cycle D under open-loop conditions must
fulfill the following inequality:
Equation 12
where T
BLANK2
= 2 µs; this is also illustrated in the diagram of Figure 24.
Naux
Ns
Vout
5
k
OVP
OVP
=
max
3
1Z
Vin
Np
Naux
103
1
R
−
⋅
≥
