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SC16C850IBS,128
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
P49-P51
P52-P54
P55-P55
SC16C850
All informatio
n provided in this d
ocument is subje
ct to legal disclai
mers.
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 2 — 11 November 2010
46 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/dec
oder
Fig 21.
Infrared transmit timing
Fig 22.
Infrared receive
timing
01010011
1
0
U
ART frame
TX data
1
/
2
bit time
002aaa21
2
data bits
star
t
stop
bit
time
IrD
A TX
data
3
/
16
bit time
01010011
1
0
U
ART frame
RX data
IrD
A RX data
bit
time
002aaa21
3
star
t
data bits
stop
0 to 1 16
×
clock dela
y
SC16C850
All informatio
n provided in this d
ocument is subje
ct to legal disclai
mers.
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 2 — 11 November 2010
47 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/dec
oder
1
1. Package
outline
Fig 23.
Package
outline SOT617-1 (HVQFN32
)
0.5
1
A
1
E
h
b
UNIT
y
e
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
5.1
4.9
D
h
3.25
2.95
y
1
5.1
4.9
3.25
2.95
e
1
3.5
e
2
3.5
0.30
0.18
0.05
0.00
0.05
0.1
DIMENSIONS (mm are the original dimensions)
SOT617-1
MO-220
- - -
- - -
0.5
0.3
L
0.1
v
0.05
w
0
2.5
5 mm
scale
SOT617
-1
H
VQFN32: plastic thermal enhanced very thin quad flat package; no leads;
3
2 terminals; body 5 x 5 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
y
1
C
e
L
E
h
D
h
e
e
1
b
91
6
32
25
24
17
8
1
X
D
E
C
B
A
e
2
terminal 1
index area
terminal 1
index area
01-08-08
02-10-18
1/2
e
1/2
e
A
C
C
B
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
SC16C850
All informatio
n provided in this d
ocument is subje
ct to legal disclai
mers.
© NXP B.V
. 2010. All rights r
eserved.
Product data sheet
Rev
. 2 — 11 November 2010
48 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/dec
oder
Fig 24.
Package
outline SOT912-1 (TFBGA36)
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT912-1
SOT912-
1
05-08-09
05-09-01
UNIT
A
max
mm
1.15
0.25
0.15
0.90
0.75
0.35
0.25
3.6
3.4
3.6
3.4
A
1
DIMENSIONS (mm are the original dimensions)
T
FBGA36: plastic thin fine-pitch ball grid array package; 36 balls; body 3.5 x 3.5 x 0.8 mm
0
2.5
5 mm
scale
A
2
b
D
E
e
2
2.5
e
0.5
e
1
2.5
y
1
0.1
v
0.15
w
0.05
y
0.08
- - -
- - -
- - -
b
e
2
e
1
e
e
1/2 e
1/2 e
A
C
B
v
M
C
w
M
ball A1
index area
A
B
C
D
E
F
246
135
ball A1
index area
B
A
E
D
C
y
C
y
1
X
detail X
A
1
A
2
A
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P36
P37-P39
P40-P42
P43-P45
P46-P48
P49-P51
P52-P54
P55-P55
SC16C850IBS,128
Mfr. #:
Buy SC16C850IBS,128
Manufacturer:
NXP Semiconductors
Description:
IC UART SGL W/FIFO 32HVQFN
Lifecycle:
New from this manufacturer.
Delivery:
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