LTC1871-7
28
18717fd
should be verified on a dedicated PC board (see Board
Layout section for more information on component place-
ment). Lab breadboards generally suffer from excessive
series inductance (due to inter-component wiring), and
these parasitics can make the switching waveforms look
significantly worse than they would be on a properly
designed PC board.
The output capacitor in a SEPIC regulator experiences
high RMS ripple currents, as shown in Figure 21. The
RMS output capacitor ripple current is:
I
RMS(COUT)
= I
O(MAX)
•
V
O
V
IN(MIN)
Note that the ripple current ratings from capacitor manu-
facturers are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
In surface mount applications, multiple capacitors may
have to be placed in parallel in order to meet the ESR or
RMS current handling requirements of the application.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount packages. In the case of
tantalum, it is critical that the capacitors have been surge
tested for use in switching power supplies. Also, ceramic
capacitors are now available with extremely low ESR, ESL
and high ripple current ratings.
SEPIC Converter: Input Capacitor Selection
The input capacitor of a SEPIC converter is less critical
than the output capacitor due to the fact that an inductor
is in series with the input and the input current waveform
is triangular in shape. The input voltage source impedance
determines the size of the input capacitor which is typi-
cally in the range of 10µF to 100µF. A low ESR capacitor
is recommended, although it is not as critical as for the
output capacitor.
applicaTions inForMaTion
The RMS input capacitor ripple current for a SEPIC con-
verter is:
I
RMS(CIN)
=
1
12
• ∆I
L
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
SEPIC Converter: Selecting the DC Coupling Capacitor
The coupling capacitor C1 in Figure 20 sees nearly a rect-
angular current waveform as shown in Figure 21. During
the switch off-time the current through C1 is I
O
(V
O
/V
IN
)
while approximately –I
O
flows during the on-time. This
current waveform creates a triangular ripple voltage on C1:
∆V
C1(P−P)
=
O(MAX)
C1• f
•
V
O
V
IN
+ V
O
+ V
D
The maximum voltage on C1 is then:
V
C1(MAX)
= V
IN
+
V
C1(P−P)
2
which is typically close to V
IN(MAX)
. The ripple current
through C1 is:
I
RMS(C1)
= I
O(MAX)
•
V
O
+ V
D
V
IN(MIN)
The value chosen for the DC coupling capacitor normally
starts with the minimum value that will satisfy 1) the RMS
current requirement and 2) the peak voltage requirement
(typically close to V
IN
). Low ESR ceramic and tantalum
capacitors work well here.
