LTC1871-7
7
18717fd
pin FuncTions
MODE/SYNC (Pin 5): This input controls the operating
mode of the converter and allows for synchronizing the
operating frequency to an external clock. If the MODE/
SYNC pin is connected to ground, Burst Mode operation
is enabled. If the MODE/SYNC pin is connected to INTV
CC
,
or if an external logic-level synchronization signal is ap-
plied to this input, Burst Mode operation is disabled and
the IC operates in a continuous mode.
GND (Pin 6): Ground Pin.
GATE (Pin 7): Gate Driver Output.
INTV
CC
(Pin 8): The Internal 7V Regulator Output. The
gate driver and control circuits are powered from this
voltage. Decouple this pin locally to the IC ground with a
minimum of 4.7µF low ESR tantalum or ceramic capacitor.
This 7V regulator has an undervoltage lockout circuit with
5.6V and 4.6V rising and falling thresholds, respectively.
V
IN
(Pin 9): Main Supply Pin. Must be closely decoupled
to ground.
SENSE (Pin 10): The Current Sense Input for the Control
Loop. Connect this pin to a resistor in the source of the
power MOSFET. Alternatively, the SENSE pin may be con-
nected to the drain of the power MOSFET, in applications
where the maximum V
DS
is less than 36V. Internal leading
edge blanking is provided for both sensing methods.
block DiagraM
+
+
+
1.230V
85mV
OV
50k
EA
UV
TO
START-UP
CONTROL
BURST
COMPARATOR
S
R
Q
LOGIC
PWM LATCH
CURRENT
COMPARATOR
0.30V
1.230V
7V
+
5.6V UP
4.6V DOWN
1.230V
SLOPE
1.230V
I
LOOP
FB
I
TH
+
g
m
3
MODE/SYNC
5
FREQ
4
2
INTV
CC
8
LDO
V-TO-I
OSCV-TO-I
SLOPE
COMPENSATION
BIAS AND
START-UP
CONTROL
V
IN
BIAS V
REF
I
OSC
R
LOOP
+
+
C1
SENSE
10
GND
18717 BD
6
GATE
INTV
CC
GND
7
V
IN
1.248V
9
RUN
C2
1
0.6V
LTC1871-7
8
18717fd
operaTion
Main Control Loop
The LTC1871-7 is a constant frequency, current mode
controller for DC/DC boost, SEPIC and flyback converter
applications. With the LTC1871-7 the current control loop
can be closed by sensing the voltage drop either across
the power MOSFET switch or across a discrete sense
resistor, as shown in Figure 2.
The nominal operating frequency of the LTC1871-7 is
programmed using a resistor from the FREQ pin to ground
and can be controlled over a 50kHz to 1000kHz range. In
addition, the internal oscillator can be synchronized to
an external clock applied to the MODE/SYNC pin and can
be locked to a frequency between 100% and 130% of its
nominal value. When the MODE/SYNC pin is left open, it
is pulled low by an internal 50k resistor and Burst Mode
operation is enabled. If this pin is taken above 2V or an
external clock is applied, Burst Mode operation is disabled
and the IC operates in continuous mode. With no load (or
an extremely light load), the controller will skip pulses
in order to maintain regulation and prevent excessive
output ripple.
The RUN pin controls whether the IC is enabled or is in a low
current shutdown state. A micropower 1.248V reference
and comparator C2 allow the user to program the supply
voltage at which the IC turns on and off (comparator C2
has 100mV of hysteresis for noise immunity). With the
RUN pin below 1.248V, the chip is off and the input supply
current is typically only 10µA.
An overvoltage comparator OV senses when the FB pin
exceeds the reference voltage by 6.5% and provides a
reset pulse to the main RS latch. Because this RS latch is
reset-dominant, the power MOSFET is actively held off for
the duration of an output overvoltage condition.
The LTC1871-7 can be used either by sensing the volt-
age drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in Figure 2. Sensing the
voltage across the power MOSFET maximizes converter
efficiency and minimizes the component count, but limits
the output voltage to the maximum rating for this pin (36V).
By connecting the SENSE pin to a resistor in the source
of the power MOSFET, the user is able to program output
voltages significantly greater than 36V.
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100µA) is a high priority, the current in
the output divider could be decreased to a few microamps
and Burst Mode operation should be applied (i.e., the
MODE/SYNC pin should be connected to ground).
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power MOSFET
is turned on when the oscillator sets the PWM latch and
is turned off when the current comparator C1 resets the
latch. The divided-down output voltage is compared to an
internal 1.230V reference by the error amplifier EA, which
outputs an error signal at the I
TH
pin. The voltage on the
I
TH
pin sets the current comparator C1 input threshold.
When the load current increases, a fall in the FB voltage
relative to the reference voltage causes the I
TH
pin to rise,
which causes the current comparator C1 to trip at a higher
peak inductor current value. The average inductor current
will therefore rise until it equals the load current, thereby
maintaining output regulation.
Figure 2. Using the SENSE Pin On the LTC1871-7
C
OUT
V
SW
V
SW
2a. SENSE Pin Connection for
Maximum Efficiency (V
SW
< 36V)
V
OUT
V
IN
GND
L
D
+
C
OUT
R
S
18717 F02
2b. SENSE Pin Connection for Precise
Control of Peak Current or for V
SW
> 36V
V
OUT
V
IN
GND
L
D
+
GATE
GND
V
IN
SENSE
GATE
GND
V
IN
SENSE
LTC1871-7
9
18717fd
operaTion
In applications where fixed frequency operation is more
critical than low current efficiency, or where the lowest
output ripple is desired, pulse-skip mode operation should
be used and the MODE/SYNC pin should be connected
to the INTV
CC
pin. This allows discontinuous conduction
mode (DCM) operation down to near the limit defined by
the chip’s minimum on-time (about 175ns). Below this
output current level, the converter will begin to skip cycles
in order to maintain output regulation. Figures 3 and 4 show
the light load switching waveforms for Burst Mode and
pulse-skip mode operation for the converter in Figure 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the I
TH
pin corresponding to
no load to full load is 0.30V to 1.2V. In Burst Mode opera-
tion, if the error amplifier EA drives the I
TH
voltage below
0.525V, the buffered I
TH
input to the current comparator
C1 will be clamped at 0.525V (which corresponds to 25%
of maximum load current). The inductor current peak is
then held at approximately 30mV divided by the power
MOSFET R
DS(ON)
. If the I
TH
pin drops below 0.30V, the
Burst Mode comparator B1 will turn off the power MOSFET
and scale back the quiescent current of the IC to 250µA
(sleep mode). In this condition, the load current will be
supplied by the output capacitor until the I
TH
voltage rises
above the 50mV hysteresis of the burst comparator. At
light loads, short bursts of switching (where the average
inductor current is 20% of its maximum value) followed
by long periods of sleep will be observed, thereby greatly
improving converter efficiency. Oscilloscope waveforms
illustrating Burst Mode operation are shown in Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered I
TH
burst clamp is removed, allowing the I
TH
pin to directly control the current comparator from no
load to full load. With no load, the I
TH
pin is driven below
0.30V, the power MOSFET is turned off and sleep mode
is invoked. Oscilloscope waveforms illustrating this mode
of operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC
pin at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the ex-
pense of overall system efficiency of light loads.
When the oscillators internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the in-
ternal oscillator ramp is terminated early and the slope
compensation is increased by approximately 30%. As
a result, in applications requiring synchronization, it is
recommended that the nominal operating frequency of
the IC be programmed to be about 75% of the external
clock frequency. Attempting to synchronize to too high an
Figure 3. LTC1871-7 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
Figure 4. LTC1871-7 Low Output Current Operation with
Burst Mode Operation Disabled (MODE/SYNC = INTV
CC
)
V
OUT
50mV/DIV
I
L
5A/DIV
10µs/DIV
18717 F03
MODE/SYNC = 0V
(Burst Mode OPERATION)
V
OUT
50mV/DIV
I
L
5A/DIV
2µs/DIV
18717 F04
MODE/SYNC = INTV
CC
(PULSE SKIP MODE)

LTC1871EMS-7#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Controllers No Rsense DC/DC Controller Boost, Flyback & SEPIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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